r600: don't emit reloc for ring buffer out into the blue
It looks like this reloc belongs to setting the constant reg, which is skipped for gs ring. Reviewed-by: Dave Airlie <airlied@redhat.com>
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@@ -2172,12 +2172,11 @@ static void evergreen_emit_constant_buffers(struct r600_context *rctx,
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DIV_ROUND_UP(cb->buffer_size, 256), pkt_flags);
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radeon_set_context_reg_flag(cs, reg_alu_const_cache + buffer_index * 4, va >> 8,
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pkt_flags);
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0) | pkt_flags);
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radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
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RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
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}
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0) | pkt_flags);
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radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
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RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
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radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 8, 0) | pkt_flags);
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radeon_emit(cs, (buffer_id_base + buffer_index) * 8);
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radeon_emit(cs, va); /* RESOURCEi_WORD0 */
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@@ -1715,12 +1715,11 @@ static void r600_emit_constant_buffers(struct r600_context *rctx,
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radeon_set_context_reg(cs, reg_alu_constbuf_size + buffer_index * 4,
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DIV_ROUND_UP(cb->buffer_size, 256));
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radeon_set_context_reg(cs, reg_alu_const_cache + buffer_index * 4, offset >> 8);
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
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radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
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RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
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}
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radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
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radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
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RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
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radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 7, 0));
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radeon_emit(cs, (buffer_id_base + buffer_index) * 7);
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radeon_emit(cs, offset); /* RESOURCEi_WORD0 */
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