i965: Add is_3src() to backend_instruction.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner
2014-12-29 19:29:21 -08:00
parent 0654ca7d7e
commit 215b081c2a
3 changed files with 8 additions and 5 deletions
+6
View File
@@ -677,6 +677,12 @@ backend_reg::is_accumulator() const
fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
}
bool
backend_instruction::is_3src() const
{
return opcode < ARRAY_SIZE(opcode_descs) && opcode_descs[opcode].nsrc == 3;
}
bool
backend_instruction::is_tex() const
{
+1
View File
@@ -82,6 +82,7 @@ struct bblock_t;
#ifdef __cplusplus
struct backend_instruction : public exec_node {
bool is_3src() const;
bool is_tex() const;
bool is_math() const;
bool is_control_flow() const;
@@ -308,11 +308,7 @@ try_copy_propagate(struct brw_context *brw, vec4_instruction *inst,
inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
return false;
bool is_3src_inst = (inst->opcode == BRW_OPCODE_LRP ||
inst->opcode == BRW_OPCODE_MAD ||
inst->opcode == BRW_OPCODE_BFE ||
inst->opcode == BRW_OPCODE_BFI2);
if (is_3src_inst && value.file == UNIFORM)
if (inst->is_3src() && value.file == UNIFORM)
return false;
if (inst->is_send_from_grf())