i965: Add 'wait' instruction support
When EU executes 'wait' instruction, it stalls and sets notification register state. Host can issue MMIO write to clear notification register state to allow EU continue on executing again. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@@ -520,6 +520,20 @@ static INLINE struct brw_reg brw_acc_reg( void )
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0);
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}
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static INLINE struct brw_reg brw_notification_1_reg(void)
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{
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return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
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BRW_ARF_NOTIFICATION_COUNT,
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1,
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BRW_REGISTER_TYPE_UD,
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BRW_VERTICAL_STRIDE_0,
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BRW_WIDTH_1,
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BRW_HORIZONTAL_STRIDE_0,
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BRW_SWIZZLE_XXXX,
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WRITEMASK_X);
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}
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static INLINE struct brw_reg brw_flag_reg( void )
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{
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@@ -919,6 +933,8 @@ void brw_land_fwd_jump(struct brw_compile *p,
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void brw_NOP(struct brw_compile *p);
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void brw_WAIT(struct brw_compile *p);
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/* Special case: there is never a destination, execution size will be
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* taken from src0:
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*/
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@@ -906,6 +906,20 @@ void brw_CMP(struct brw_compile *p,
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}
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}
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/* Issue 'wait' instruction for n1, host could program MMIO
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to wake up thread. */
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void brw_WAIT (struct brw_compile *p)
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{
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struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT);
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struct brw_reg src = brw_notification_1_reg();
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brw_set_dest(insn, src);
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brw_set_src0(insn, src);
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brw_set_src1(insn, brw_null_reg());
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insn->header.execution_size = 0; /* must */
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insn->header.predicate_control = 0;
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insn->header.compression_control = 0;
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}
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/***********************************************************************
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