r600/sfn: on R600/R700 write a dummy pixel output if there is a gap
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9223
Fixes: 98d65120cb
r600/sfn: Fix FS out handling
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23717>
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@@ -540,6 +540,8 @@ FragmentShader::emit_export_pixel(nir_intrinsic_instr& intr)
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m_fs_write_all = false;
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unsigned mask = (0xfu << (location * 4));
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m_color_export_written_mask |= (1 << location);
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/* If the i-th target format is set, all previous target formats must
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* be non-zero to avoid hangs. - from radeonsi, seems to apply to eg as well.
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/*/
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@@ -589,6 +591,27 @@ FragmentShader::emit_load_sample_pos(nir_intrinsic_instr *instr)
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void
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FragmentShader::do_finalize()
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{
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/* On pre-evergreen not emtting something to all color exports that
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* are enabled might lead to a hang.
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* see: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9223
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*/
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if (chip_class() < ISA_CC_EVERGREEN) {
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unsigned i = 0;
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unsigned mask = m_color_export_mask;
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while (mask & (1u << (4 * i))) {
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if (!(m_color_export_written_mask & (1u << i))) {
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RegisterVec4 value(0, false, {7, 7, 7, 7});
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m_last_pixel_export = new ExportInstr(ExportInstr::pixel, i, value);
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emit_instruction(m_last_pixel_export);
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m_num_color_exports++;
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if (m_export_highest < i)
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m_export_highest = i;
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}
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++i;
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}
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}
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if (!m_last_pixel_export) {
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RegisterVec4 value(0, false, {7, 7, 7, 7});
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m_last_pixel_export = new ExportInstr(ExportInstr::pixel, 0, value);
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@@ -76,6 +76,7 @@ private:
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unsigned m_num_color_exports;
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unsigned m_color_export_mask;
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ExportInstr *m_last_pixel_export;
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unsigned m_color_export_written_mask{0};
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std::bitset<s_max_interpolators> m_interpolators_used;
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RegisterVec4 m_pos_input;
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