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etnaviv: isa: Add branch_any opcode

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Encoded instruction is taken from blob running:
- dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.basic.bvec3_api_int_both

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27871>
This commit is contained in:
Christian Gmeiner
2024-02-29 09:35:47 +01:00
committed by Marge Bot
parent 6a71636179
commit 20022f5389
2 changed files with 5 additions and 1 deletions
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src/etnaviv/isa/etnaviv.xml
+4 -1
View File
@@ -1007,7 +1007,10 @@ SPDX-License-Identifier: MIT
<pattern pos="80">0</pattern> <!-- OPCODE_BIT6 -->
</bitset>
<!-- branch2 -->
<bitset name="branch_any" extends="#instruction-cf-src1-src2">
<pattern low="0" high="5">100100</pattern> <!-- OPC -->
<pattern pos="80">0</pattern> <!-- OPCODE_BIT6 -->
</bitset>
<bitset name="floor" extends="#instruction-alu-src2">
<pattern low="0" high="5">100101</pattern> <!-- OPC -->
src/etnaviv/isa/tests/disasm.cpp
+1
View File
@@ -115,6 +115,7 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
disasm_state{ {0x00801021, 0x00000004, 0x00000000, 0x00000008}, "sqrt t0.x___, void, void, t0.xxxx\n" },
disasm_state{ {0x03001022, 0x00000005, 0x00000000, 0x00154008}, "sin.rtz t0.zy, void, void, t0.yyyy\n" },
disasm_state{ {0x01801023, 0x00000005, 0x00000000, 0x00000008}, "cos.rtz t0.xy__, void, void, t0.xxxx\n" },
disasm_state{ {0x000001a4, 0x3e401804, 0x500000c0, 0x00000487}, "branch_any.ne.s32 void, t1.yzww, 1, 9\t; dontcare bits in branch_any: 00000000000000000000000400000000\n" },
disasm_state{ {0x00801025, 0x00000004, 0x00000000, 0x00000008}, "floor t0.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801026, 0x00000004, 0x00000000, 0x00000008}, "ceil t0.x___, void, void, t0.xxxx\n"},
disasm_state{ {0x00801027, 0x00000004, 0x00000000, 0x00000008}, "sign t0.x___, void, void, t0.xxxx\n" },