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genxml: Drop bit 27 from RENDER_SURFACE_STATE::Surface Format

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Bit 27 is the "ASTC Format" bit in the PRMs but we just extended the
Surface Format field by one bit and made sure all the ASTC formats have
that bit set.  Since Gfx12.5 doesn't support ASTC, we can drop that bit
from the field and this will cause GenXML packing functions to assert if
it's ever set.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13206>
This commit is contained in:
Jason Ekstrand
2021-10-05 16:42:58 -05:00
committed by Marge Bot
parent e7f3da0138
commit 1f7e11a190
1 changed files with 1 additions and 1 deletions
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2
src/intel/genxml/gen125.xml
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@@ -758,7 +758,7 @@
<value name="VALIGN_8" value="2"/>
<value name="VALIGN_16" value="3"/>
</field>
<field name="Surface Format" start="18" end="27" type="uint"/>
<field name="Surface Format" start="18" end="26" type="uint"/>
<field name="Surface Array" start="28" end="28" type="bool"/>
<field name="Surface Type" start="29" end="31" type="uint">
<value name="SURFTYPE_1D" value="0"/>