nouveau/headers: Handle unbound sub channels in vk_push_print
In case of a unbound subchannel usage, the hardware will route it to the GPFIFO class. NVIDIA blobs use this and this was causing an assertion to be fired up in nv_push_dump. This adds support for that and also add mapping for cls_gpfifo in nv_push_dump. Signed-off-by: Mary Guillemard <mary@mary.zone> Reviewed-by: Mel Henning <mhenning@darkrefraction.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37475>
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1c08e7766e
@@ -44,6 +44,7 @@ struct nv_device_info {
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uint16_t cls_eng3d;
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uint16_t cls_m2mf;
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uint16_t cls_compute;
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uint16_t cls_gpfifo;
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uint64_t vram_size_B;
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uint64_t bar_size_B;
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@@ -147,6 +147,11 @@ vk_push_print(FILE *fp, const struct nv_push *push,
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}
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int class_id = curr_subchans[subchan];
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/* If the sub channel is unbound, the expected behavior is to have it
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* routed to the GPFIFO class */
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if (class_id == 0)
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class_id = devinfo->cls_gpfifo;
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if (!is_tert)
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mthd_name = P_PARSE_NV_MTHD(class_id, mthd);
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@@ -26,6 +26,26 @@
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#include "clcd97.h"
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#include "clce97.h"
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#include "cla06f.h"
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#include "clb06f.h"
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#include "clc06f.h"
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#include "clc36f.h"
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#include "clc46f.h"
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#include "clc56f.h"
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/* AMPERE_CHANNEL_GPFIFO_B has one typo and as we are replacing
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* headers with the ones from the open-gpu-doc repo, let's hack around this for
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* now
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* XXX: Remove this once it's fixed
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*/
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#define AmpereAControlGPFifo AmpereBControlGPFifo
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#include "clc76f.h"
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#undef AmpereAControlGPFifo
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#include "clc86f.h"
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#include "clc96f.h"
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#include "clca6f.h"
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#include "cla0b5.h"
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#include "clb0b5.h"
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#include "clc0b5.h"
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@@ -54,48 +74,59 @@ static struct nv_device_info get_fake_device_info(const char *arch_name) {
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info.cls_eng3d = KEPLER_A;
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info.cls_copy = KEPLER_DMA_COPY_A;
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info.cls_m2mf = KEPLER_INLINE_TO_MEMORY_A;
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info.cls_gpfifo = KEPLER_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "MAXWELL")) {
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info.cls_eng3d = MAXWELL_A;
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info.cls_compute = MAXWELL_COMPUTE_A;
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info.cls_copy = MAXWELL_DMA_COPY_A;
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info.cls_gpfifo = MAXWELL_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "PASCAL")) {
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info.cls_eng3d = PASCAL_A;
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info.cls_compute = PASCAL_COMPUTE_A;
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info.cls_copy = PASCAL_DMA_COPY_A;
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info.cls_gpfifo = PASCAL_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "VOLTA")) {
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info.cls_eng3d = VOLTA_A;
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info.cls_compute = VOLTA_COMPUTE_A;
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info.cls_copy = VOLTA_DMA_COPY_A;
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info.cls_gpfifo = VOLTA_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "TURING")) {
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info.cls_eng3d = TURING_A;
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info.cls_compute = TURING_COMPUTE_A;
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info.cls_copy = TURING_DMA_COPY_A;
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info.cls_gpfifo = TURING_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "AMPERE")) {
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info.cls_eng3d = AMPERE_A;
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info.cls_compute = AMPERE_COMPUTE_B;
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info.cls_copy = AMPERE_DMA_COPY_A;
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info.cls_gpfifo = AMPERE_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "ADA")) {
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info.cls_eng3d = ADA_A;
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info.cls_compute = ADA_COMPUTE_A;
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info.cls_copy = AMPERE_DMA_COPY_A;
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info.cls_gpfifo = AMPERE_CHANNEL_GPFIFO_B;
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} else if (!strcmp(arch_name, "HOPPER")) {
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info.cls_eng3d = HOPPER_A;
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info.cls_compute = HOPPER_COMPUTE_A;
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info.cls_copy = AMPERE_DMA_COPY_A;
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info.cls_gpfifo = HOPPER_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "BLACKWELL_A")) {
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info.cls_eng3d = BLACKWELL_A;
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info.cls_compute = BLACKWELL_COMPUTE_A;
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info.cls_copy = BLACKWELL_DMA_COPY_A;
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info.cls_gpfifo = BLACKWELL_CHANNEL_GPFIFO_A;
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} else if (!strcmp(arch_name, "BLACKWELL_B")) {
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info.cls_eng3d = BLACKWELL_B;
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info.cls_compute = BLACKWELL_COMPUTE_B;
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info.cls_copy = BLACKWELL_DMA_COPY_B;
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info.cls_gpfifo = BLACKWELL_CHANNEL_GPFIFO_B;
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} else {
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fprintf(stderr, "Unknown architecture \"%s\", defaulting to Turing",
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arch_name);
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info.cls_eng3d = TURING_A;
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info.cls_compute = TURING_COMPUTE_A;
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info.cls_copy = TURING_DMA_COPY_A;
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info.cls_gpfifo = TURING_CHANNEL_GPFIFO_A;
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}
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info.cls_eng2d = FERMI_TWOD_A;
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