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radeonsi: move CP_DMA_ALIGNMENT definition

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
2017-02-09 02:17:37 +01:00
parent 4c288c73ea
commit 1a392a4377
2 changed files with 10 additions and 10 deletions
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src/gallium/drivers/radeonsi/si_cp_dma.c
+8 -10
View File
@@ -28,10 +28,8 @@
#include "sid.h"
#include "radeon/r600_cs.h"
/* Alignment for optimal performance. */
#define CP_DMA_ALIGNMENT 32
/* The max number of bytes to copy per packet. */
#define CP_DMA_MAX_BYTE_COUNT ((1 << 21) - CP_DMA_ALIGNMENT)
#define CP_DMA_MAX_BYTE_COUNT ((1 << 21) - SI_CPDMA_ALIGNMENT)
/* Set this if you want the ME to wait until CP DMA is done.
* It should be set on the last CP DMA packet. */
@@ -267,9 +265,9 @@ static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size,
{
uint64_t va;
unsigned dma_flags = 0;
unsigned scratch_size = CP_DMA_ALIGNMENT * 2;
unsigned scratch_size = SI_CPDMA_ALIGNMENT * 2;
assert(size < CP_DMA_ALIGNMENT);
assert(size < SI_CPDMA_ALIGNMENT);
/* Use the scratch buffer as the dummy buffer. The 3D engine should be
* idle at this point.
@@ -291,7 +289,7 @@ static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size,
is_first, &dma_flags);
va = sctx->scratch_buffer->gpu_address;
si_emit_cp_dma(sctx, va, va + CP_DMA_ALIGNMENT, size, dma_flags,
si_emit_cp_dma(sctx, va, va + SI_CPDMA_ALIGNMENT, size, dma_flags,
R600_COHERENCY_SHADER);
}
@@ -333,15 +331,15 @@ void si_copy_buffer(struct si_context *sctx,
* just to align the internal counter. Otherwise, the DMA engine
* would slow down by an order of magnitude for following copies.
*/
if (size % CP_DMA_ALIGNMENT)
realign_size = CP_DMA_ALIGNMENT - (size % CP_DMA_ALIGNMENT);
if (size % SI_CPDMA_ALIGNMENT)
realign_size = SI_CPDMA_ALIGNMENT - (size % SI_CPDMA_ALIGNMENT);
/* If the copy begins unaligned, we must start copying from the next
* aligned block and the skipped part should be copied after everything
* else has been copied. Only the src alignment matters, not dst.
*/
if (src_offset % CP_DMA_ALIGNMENT) {
skipped_size = CP_DMA_ALIGNMENT - (src_offset % CP_DMA_ALIGNMENT);
if (src_offset % SI_CPDMA_ALIGNMENT) {
skipped_size = SI_CPDMA_ALIGNMENT - (src_offset % SI_CPDMA_ALIGNMENT);
/* The main part will be skipped if the size is too small. */
skipped_size = MIN2(skipped_size, size);
size -= skipped_size;
src/gallium/drivers/radeonsi/si_pipe.h
+2
View File
@@ -41,6 +41,8 @@
#define SI_RESTART_INDEX_UNKNOWN INT_MIN
#define SI_NUM_SMOOTH_AA_SAMPLES 8
#define SI_GS_PER_ES 128
/* Alignment for optimal CP DMA performance. */
#define SI_CPDMA_ALIGNMENT 32
/* Instruction cache. */
#define SI_CONTEXT_INV_ICACHE (R600_CONTEXT_PRIVATE_FLAG << 0)