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r600g: refactor sample states into a reusable struct.

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I will not cut-n-paste.
I will not cut-n-paste.
I will not cut-n-paste.
This commit is contained in:
Dave Airlie
2010-09-03 14:12:38 +10:00
parent 9ef228ee2d
commit 191bfc5c3b
2 changed files with 78 additions and 97 deletions
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src/gallium/drivers/r600/r600_context.h
+13 -10
View File
@@ -124,6 +124,15 @@ struct r600_context_hw_states {
#define R600_MAX_CONSTANT 256 /* magic */
#define R600_MAX_RESOURCE 160 /* magic */
struct r600_shader_sampler_states {
unsigned nsampler;
unsigned nview;
unsigned nborder;
struct radeon_state *sampler[PIPE_MAX_ATTRIBS];
struct radeon_state *view[PIPE_MAX_ATTRIBS];
struct radeon_state *border[PIPE_MAX_ATTRIBS];
};
struct r600_context {
struct pipe_context context;
struct r600_screen *screen;
@@ -141,11 +150,7 @@ struct r600_context {
struct r600_context_hw_states hw_states;
/* pipe states */
unsigned flat_shade;
unsigned ps_nsampler;
unsigned vs_nsampler;
unsigned ps_nsampler_view;
unsigned vs_nsampler_view;
unsigned ps_nsampler_border;
unsigned nvertex_buffer;
struct r600_context_state *rasterizer;
struct r600_context_state *poly_stipple;
@@ -161,11 +166,9 @@ struct r600_context {
struct r600_context_state *stencil_ref;
struct r600_context_state *viewport;
struct r600_context_state *framebuffer;
struct radeon_state *ps_sampler[PIPE_MAX_ATTRIBS];
struct radeon_state *vs_sampler[PIPE_MAX_ATTRIBS];
struct radeon_state *ps_sampler_view[PIPE_MAX_ATTRIBS];
struct radeon_state *vs_sampler_view[PIPE_MAX_ATTRIBS];
struct radeon_state *ps_sampler_border[PIPE_MAX_ATTRIBS];
struct r600_shader_sampler_states vs_sampler;
struct r600_shader_sampler_states ps_sampler;
/* can add gs later */
struct r600_vertex_element *vertex_elements;
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
struct pipe_index_buffer index_buffer;
src/gallium/drivers/r600/r600_state.c
+65 -87
View File
@@ -128,17 +128,20 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
return &rstate->state.sampler_view;
}
static void r600_set_ps_sampler_view(struct pipe_context *ctx,
unsigned count,
struct pipe_sampler_view **views)
static void r600_set_sampler_view(struct pipe_context *ctx,
unsigned count,
struct pipe_sampler_view **views,
struct r600_shader_sampler_states *sampler,
unsigned shader_id)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_context_state *rstate;
unsigned i;
for (i = 0; i < rctx->ps_nsampler_view; i++) {
radeon_draw_unbind(&rctx->draw, rctx->ps_sampler_view[i]);
for (i = 0; i < sampler->nview; i++) {
radeon_draw_unbind(&rctx->draw, sampler->view[i]);
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)views[i];
if (rstate) {
@@ -153,12 +156,20 @@ static void r600_set_ps_sampler_view(struct pipe_context *ctx,
if (rstate->nrstate) {
memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
}
radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_RESOURCE, i, R600_SHADER_PS);
rctx->ps_sampler_view[i] = &rstate->rstate[rstate->nrstate];
radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_RESOURCE, i, shader_id);
sampler->view[i] = &rstate->rstate[rstate->nrstate];
rstate->nrstate++;
}
}
rctx->ps_nsampler_view = count;
sampler->nview = count;
}
static void r600_set_ps_sampler_view(struct pipe_context *ctx,
unsigned count,
struct pipe_sampler_view **views)
{
struct r600_context *rctx = r600_context(ctx);
r600_set_sampler_view(ctx, count, views, &rctx->ps_sampler, R600_SHADER_PS);
}
static void r600_set_vs_sampler_view(struct pipe_context *ctx,
@@ -166,32 +177,7 @@ static void r600_set_vs_sampler_view(struct pipe_context *ctx,
struct pipe_sampler_view **views)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_context_state *rstate;
unsigned i;
for (i = 0; i < rctx->vs_nsampler_view; i++) {
radeon_draw_unbind(&rctx->draw, rctx->vs_sampler_view[i]);
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)views[i];
if (rstate) {
rstate->nrstate = 0;
}
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)views[i];
if (rstate) {
if (rstate->nrstate >= R600_MAX_RSTATE)
continue;
if (rstate->nrstate) {
memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
}
radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_RESOURCE, i, R600_SHADER_VS);
rctx->vs_sampler_view[i] = &rstate->rstate[rstate->nrstate];
rstate->nrstate++;
}
}
rctx->vs_nsampler_view = count;
r600_set_sampler_view(ctx, count, views, &rctx->vs_sampler, R600_SHADER_VS);
}
static void *r600_create_shader_state(struct pipe_context *ctx,
@@ -299,18 +285,19 @@ static void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
rctx->vs_shader = r600_context_state_incref(rstate);
}
static void r600_bind_ps_sampler(struct pipe_context *ctx,
unsigned count, void **states)
static void r600_bind_sampler_shader(struct pipe_context *ctx,
unsigned count, void **states,
struct r600_shader_sampler_states *sampler, unsigned shader_id)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_context_state *rstate;
unsigned i;
for (i = 0; i < rctx->ps_nsampler; i++) {
radeon_draw_unbind(&rctx->draw, rctx->ps_sampler[i]);
for (i = 0; i < sampler->nsampler; i++) {
radeon_draw_unbind(&rctx->draw, sampler->sampler[i]);
}
for (i = 0; i < rctx->ps_nsampler_border; i++) {
radeon_draw_unbind(&rctx->draw, rctx->ps_sampler_border[i]);
for (i = 0; i < sampler->nborder; i++) {
radeon_draw_unbind(&rctx->draw, sampler->border[i]);
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)states[i];
@@ -327,47 +314,29 @@ static void r600_bind_ps_sampler(struct pipe_context *ctx,
memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
memcpy(&rstate->rstate[rstate->nrstate+1], &rstate->rstate[1], sizeof(struct radeon_state));
}
radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_SAMPLER, i, R600_SHADER_PS);
radeon_state_convert(&rstate->rstate[rstate->nrstate + 1], R600_STATE_SAMPLER_BORDER, i, R600_SHADER_PS);
rctx->ps_sampler[i] = &rstate->rstate[rstate->nrstate];
rctx->ps_sampler_border[i] = &rstate->rstate[rstate->nrstate + 1];
radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_SAMPLER, i, shader_id);
radeon_state_convert(&rstate->rstate[rstate->nrstate + 1], R600_STATE_SAMPLER_BORDER, i, shader_id);
sampler->sampler[i] = &rstate->rstate[rstate->nrstate];
sampler->border[i] = &rstate->rstate[rstate->nrstate + 1];
rstate->nrstate += 2;
}
}
rctx->ps_nsampler = count;
rctx->ps_nsampler_border = count;
sampler->nsampler = count;
sampler->nborder = count;
}
static void r600_bind_ps_sampler(struct pipe_context *ctx,
unsigned count, void **states)
{
struct r600_context *rctx = r600_context(ctx);
r600_bind_sampler_shader(ctx, count, states, &rctx->ps_sampler, R600_SHADER_PS);
}
static void r600_bind_vs_sampler(struct pipe_context *ctx,
unsigned count, void **states)
{
struct r600_context *rctx = r600_context(ctx);
struct r600_context_state *rstate;
unsigned i;
for (i = 0; i < rctx->vs_nsampler; i++) {
radeon_draw_unbind(&rctx->draw, rctx->vs_sampler[i]);
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)states[i];
if (rstate) {
rstate->nrstate = 0;
}
}
for (i = 0; i < count; i++) {
rstate = (struct r600_context_state *)states[i];
if (rstate) {
if (rstate->nrstate >= R600_MAX_RSTATE)
continue;
if (rstate->nrstate) {
memcpy(&rstate->rstate[rstate->nrstate], &rstate->rstate[0], sizeof(struct radeon_state));
}
radeon_state_convert(&rstate->rstate[rstate->nrstate], R600_STATE_SAMPLER, i, R600_SHADER_VS);
rctx->vs_sampler[i] = &rstate->rstate[rstate->nrstate];
rstate->nrstate++;
}
}
rctx->vs_nsampler = count;
r600_bind_sampler_shader(ctx, count, states, &rctx->vs_sampler, R600_SHADER_VS);
}
static void r600_delete_state(struct pipe_context *ctx, void *state)
@@ -1244,6 +1213,26 @@ static void r600_cb_cntl(struct r600_context *rctx, struct radeon_state *rstate)
radeon_state_pm4(rstate);
}
static void r600_bind_shader_sampler(struct r600_context *rctx, struct r600_shader_sampler_states *sampler)
{
int i;
for (i = 0; i < sampler->nsampler; i++) {
if (sampler->sampler[i])
radeon_draw_bind(&rctx->draw, sampler->sampler[i]);
}
for (i = 0; i < sampler->nborder; i++) {
if (sampler->border[i])
radeon_draw_bind(&rctx->draw, sampler->border[i]);
}
for (i = 0; i < sampler->nview; i++) {
if (sampler->view[i])
radeon_draw_bind(&rctx->draw, sampler->view[i]);
}
}
int r600_context_hw_states(struct pipe_context *ctx)
{
struct r600_context *rctx = r600_context(ctx);
@@ -1278,20 +1267,9 @@ int r600_context_hw_states(struct pipe_context *ctx)
if (rctx->framebuffer->state.framebuffer.zsbuf) {
radeon_draw_bind(&rctx->draw, &rctx->framebuffer->rstate[0]);
}
for (i = 0; i < rctx->ps_nsampler; i++) {
if (rctx->ps_sampler[i]) {
radeon_draw_bind(&rctx->draw, rctx->ps_sampler[i]);
}
}
for (i = 0; i < rctx->ps_nsampler_border; i++) {
if (rctx->ps_sampler_border[i]) {
radeon_draw_bind(&rctx->draw, rctx->ps_sampler_border[i]);
}
}
for (i = 0; i < rctx->ps_nsampler_view; i++) {
if (rctx->ps_sampler_view[i]) {
radeon_draw_bind(&rctx->draw, rctx->ps_sampler_view[i]);
}
}
r600_bind_shader_sampler(rctx, &rctx->vs_sampler);
r600_bind_shader_sampler(rctx, &rctx->ps_sampler);
return 0;
}