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nv40: move "channel context" stuff into nv40_screen

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This commit is contained in:
Ben Skeggs
2008-02-29 23:08:01 +11:00
parent baaae562f0
commit 17f6db9d01
16 changed files with 204 additions and 238 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/nv40/nv40_context.c
+6 -162
View File
@@ -6,10 +6,6 @@
#include "nv40_context.h"
#include "nv40_screen.h"
#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
static void
nv40_flush(struct pipe_context *pipe, unsigned flags)
{
@@ -24,7 +20,7 @@ nv40_flush(struct pipe_context *pipe, unsigned flags)
}
if (flags & PIPE_FLUSH_WAIT) {
nvws->notifier_reset(nv40->hw->sync, 0);
nvws->notifier_reset(nv40->screen->sync, 0);
BEGIN_RING(curie, 0x104, 1);
OUT_RING (0);
BEGIN_RING(curie, 0x100, 1);
@@ -34,149 +30,7 @@ nv40_flush(struct pipe_context *pipe, unsigned flags)
FIRE_RING();
if (flags & PIPE_FLUSH_WAIT)
nvws->notifier_wait(nv40->hw->sync, 0, 0, 2000);
}
static void
nv40_channel_takedown(struct nv40_channel_context *cnv40)
{
struct nouveau_winsys *nvws = cnv40->nvws;
nvws->res_free(&cnv40->vp_exec_heap);
nvws->res_free(&cnv40->vp_data_heap);
nvws->res_free(&cnv40->query_heap);
nvws->notifier_free(&cnv40->query);
nvws->notifier_free(&cnv40->sync);
nvws->grobj_free(&cnv40->curie);
free(cnv40);
}
static struct nv40_channel_context *
nv40_channel_init(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
unsigned chipset)
{
struct nv40_channel_context *cnv40 = NULL;
struct nouveau_stateobj *so;
unsigned curie_class = 0;
int ret;
switch (chipset & 0xf0) {
case 0x40:
if (NV4X_GRCLASS4097_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV40TCL;
else
if (NV4X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV44TCL;
break;
case 0x60:
if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV44TCL;
break;
default:
break;
}
if (!curie_class) {
NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset);
return NULL;
}
cnv40 = CALLOC(1, sizeof(struct nv40_channel_context));
if (!cnv40)
return NULL;
cnv40->chipset = chipset;
cnv40->nvws = nvws;
/* Notifier for sync purposes */
ret = nvws->notifier_alloc(nvws, 1, &cnv40->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
nv40_channel_takedown(cnv40);
return NULL;
}
/* Query objects */
ret = nvws->notifier_alloc(nvws, 32, &cnv40->query);
if (ret) {
NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
nv40_channel_takedown(cnv40);
return NULL;
}
ret = nvws->res_init(&cnv40->query_heap, 0, 32);
if (ret) {
NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
nv40_channel_takedown(cnv40);
return NULL;
}
/* Vtxprog resources */
if (nvws->res_init(&cnv40->vp_exec_heap, 0, 512) ||
nvws->res_init(&cnv40->vp_data_heap, 0, 256)) {
nv40_channel_takedown(cnv40);
return NULL;
}
/* 3D object */
ret = nvws->grobj_alloc(nvws, curie_class, &cnv40->curie);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return FALSE;
}
/* Static curie initialisation */
so = so_new(128, 0);
so_method(so, cnv40->curie, NV40TCL_DMA_NOTIFY, 1);
so_data (so, cnv40->sync->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_TEXTURE0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->gart->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_COLOR1, 1);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_COLOR0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_VTXBUF0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->gart->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_FENCE, 2);
so_data (so, 0);
so_data (so, cnv40->query->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_UNK01AC, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, NV40TCL_DMA_COLOR2, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, cnv40->curie, 0x1ea4, 3);
so_data (so, 0x00000010);
so_data (so, 0x01000100);
so_data (so, 0xff800006);
/* vtxprog output routing */
so_method(so, cnv40->curie, 0x1fc4, 1);
so_data (so, 0x06144321);
so_method(so, cnv40->curie, 0x1fc8, 2);
so_data (so, 0xedcba987);
so_data (so, 0x00000021);
so_method(so, cnv40->curie, 0x1fd0, 1);
so_data (so, 0x00171615);
so_method(so, cnv40->curie, 0x1fd4, 1);
so_data (so, 0x001b1a19);
so_method(so, cnv40->curie, 0x1ef8, 1);
so_data (so, 0x0020ffff);
so_method(so, cnv40->curie, 0x1d64, 1);
so_data (so, 0x00d30000);
so_method(so, cnv40->curie, 0x1e94, 1);
so_data (so, 0x00000001);
so_emit(nvws, so);
so_ref(NULL, &so);
nvws->push_flush(nvws->channel, 0);
return cnv40;
nvws->notifier_wait(nv40->screen->sync, 0, 0, 2000);
}
static void
@@ -186,32 +40,22 @@ nv40_destroy(struct pipe_context *pipe)
if (nv40->draw)
draw_destroy(nv40->draw);
if (nv40->hw) {
if (--nv40->hw->refcount == 0)
nv40_channel_takedown(nv40->hw);
}
free(nv40);
}
struct pipe_context *
nv40_create(struct pipe_screen *pscreen)
{
struct nv40_screen *screen = nv40_screen(pscreen);
struct pipe_winsys *ws = pscreen->winsys;
struct nv40_context *nv40;
unsigned chipset = nv40_screen(pscreen)->chipset;
struct nouveau_winsys *nvws = nv40_screen(pscreen)->nvws;
unsigned chipset = screen->chipset;
struct nouveau_winsys *nvws = screen->nvws;
nv40 = CALLOC(1, sizeof(struct nv40_context));
if (!nv40)
return NULL;
nv40->hw = nv40_channel_init(ws, nvws, chipset);
if (!nv40->hw) {
nv40_destroy(&nv40->pipe);
return NULL;
}
nv40->screen = screen;
nv40->chipset = chipset;
nv40->nvws = nvws;
src/gallium/drivers/nv40/nv40_context.h
+6 -25
View File
@@ -11,7 +11,7 @@
#include "nouveau/nouveau_gldefs.h"
#define NOUVEAU_PUSH_CONTEXT(ctx) \
struct nv40_channel_context *ctx = nv40->hw
struct nv40_screen *ctx = nv40->screen
#include "nouveau/nouveau_push.h"
#include "nouveau/nouveau_stateobj.h"
@@ -59,6 +59,8 @@ enum nv40_state_index {
NV40_STATE_MAX = 33
};
#include "nv40_screen.h"
#define NV40_NEW_BLEND (1 << 0)
#define NV40_NEW_RAST (1 << 1)
#define NV40_NEW_ZSA (1 << 2)
@@ -76,28 +78,6 @@ enum nv40_state_index {
#define NV40_FALLBACK_TNL (1 << 0)
#define NV40_FALLBACK_RAST (1 << 1)
struct nv40_channel_context {
struct nouveau_winsys *nvws;
unsigned refcount;
unsigned chipset;
/* HW graphics objects */
struct nouveau_grobj *curie;
struct nouveau_notifier *sync;
/* Query object resources */
struct nouveau_notifier *query;
struct nouveau_resource *query_heap;
/* Vtxprog resources */
struct nouveau_resource *vp_exec_heap;
struct nouveau_resource *vp_data_heap;
/* Current 3D state of channel */
struct nouveau_stateobj *state[NV40_STATE_MAX];
};
struct nv40_rasterizer_state {
struct pipe_rasterizer_state pipe;
struct nouveau_stateobj *so;
@@ -125,9 +105,10 @@ struct nv40_state {
struct nv40_context {
struct pipe_context pipe;
struct nouveau_winsys *nvws;
struct nv40_channel_context *hw;
struct nouveau_winsys *nvws;
struct nv40_screen *screen;
struct draw_context *draw;
int chipset;
src/gallium/drivers/nv40/nv40_fragprog.c
+2 -2
View File
@@ -810,11 +810,11 @@ nv40_fragprog_validate(struct nv40_context *nv40)
nv40_fragprog_upload(nv40, fp);
so = so_new(4, 1);
so_method(so, nv40->hw->curie, NV40TCL_FP_ADDRESS, 1);
so_method(so, nv40->screen->curie, NV40TCL_FP_ADDRESS, 1);
so_reloc (so, fp->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
NV40TCL_FP_ADDRESS_DMA0, NV40TCL_FP_ADDRESS_DMA1);
so_method(so, nv40->hw->curie, NV40TCL_FP_CONTROL, 1);
so_method(so, nv40->screen->curie, NV40TCL_FP_CONTROL, 1);
so_data (so, fp->fp_control);
so_ref(so, &fp->so);
src/gallium/drivers/nv40/nv40_fragtex.c
+3 -3
View File
@@ -106,7 +106,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
txs = tf->swizzle;
so = so_new(16, 2);
so_method(so, nv40->hw->curie, NV40TCL_TEX_OFFSET(unit), 8);
so_method(so, nv40->screen->curie, NV40TCL_TEX_OFFSET(unit), 8);
so_reloc (so, nv40mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, nv40mt->buffer, txf, tex_flags | NOUVEAU_BO_OR,
NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
@@ -117,7 +117,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
so_data (so, (pt->width[0] << NV40TCL_TEX_SIZE0_W_SHIFT) |
pt->height[0]);
so_data (so, ps->bcol);
so_method(so, nv40->hw->curie, NV40TCL_TEX_SIZE1(unit), 1);
so_method(so, nv40->screen->curie, NV40TCL_TEX_SIZE1(unit), 1);
so_data (so, (pt->depth[0] << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp);
return so;
@@ -137,7 +137,7 @@ nv40_fragtex_validate(struct nv40_context *nv40)
samplers &= ~(1 << unit);
so = so_new(2, 0);
so_method(so, nv40->hw->curie, NV40TCL_TEX_ENABLE(unit), 1);
so_method(so, nv40->screen->curie, NV40TCL_TEX_ENABLE(unit), 1);
so_data (so, 0);
so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]);
state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit));
src/gallium/drivers/nv40/nv40_query.c
+5 -5
View File
@@ -45,9 +45,9 @@ nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq)
assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER);
if (nv40->nvws->res_alloc(nv40->hw->query_heap, 1, NULL, &q->object))
if (nv40->nvws->res_alloc(nv40->screen->query_heap, 1, NULL, &q->object))
assert(0);
nv40->nvws->notifier_reset(nv40->hw->query, q->object->start);
nv40->nvws->notifier_reset(nv40->screen->query, q->object->start);
BEGIN_RING(curie, NV40TCL_QUERY_RESET, 1);
OUT_RING (1);
@@ -82,17 +82,17 @@ nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq,
if (!q->ready) {
unsigned status;
status = nvws->notifier_status(nv40->hw->query,
status = nvws->notifier_status(nv40->screen->query,
q->object->start);
if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) {
if (wait == FALSE)
return FALSE;
nvws->notifier_wait(nv40->hw->query, q->object->start,
nvws->notifier_wait(nv40->screen->query, q->object->start,
NV_NOTIFY_STATE_STATUS_COMPLETED,
0);
}
q->result = nvws->notifier_retval(nv40->hw->query,
q->result = nvws->notifier_retval(nv40->screen->query,
q->object->start);
q->ready = TRUE;
nvws->res_free(&q->object);
src/gallium/drivers/nv40/nv40_screen.c
+127 -1
View File
@@ -4,6 +4,10 @@
#include "nv40_context.h"
#include "nv40_screen.h"
#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
#define NV4X_GRCLASS4497_CHIPSETS 0x00005450
#define NV6X_GRCLASS4497_CHIPSETS 0x00000088
static const char *
nv40_screen_get_name(struct pipe_screen *pscreen)
{
@@ -121,6 +125,16 @@ nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
static void
nv40_screen_destroy(struct pipe_screen *pscreen)
{
struct nv40_screen *screen = nv40_screen(pscreen);
struct nouveau_winsys *nvws = screen->nvws;
nvws->res_free(&screen->vp_exec_heap);
nvws->res_free(&screen->vp_data_heap);
nvws->res_free(&screen->query_heap);
nvws->notifier_free(&screen->query);
nvws->notifier_free(&screen->sync);
nvws->grobj_free(&screen->curie);
FREE(pscreen);
}
@@ -129,13 +143,125 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
unsigned chipset)
{
struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen);
struct nouveau_stateobj *so;
unsigned curie_class;
int ret;
if (!screen)
return NULL;
screen->chipset = chipset;
screen->nvws = nvws;
/* 3D object */
switch (chipset & 0xf0) {
case 0x40:
if (NV4X_GRCLASS4097_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV40TCL;
else
if (NV4X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV44TCL;
break;
case 0x60:
if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
curie_class = NV44TCL;
break;
default:
break;
}
if (!curie_class) {
NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset);
return NULL;
}
ret = nvws->grobj_alloc(nvws, curie_class, &screen->curie);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return FALSE;
}
/* Notifier for sync purposes */
ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
nv40_screen_destroy(&screen->pipe);
return NULL;
}
/* Query objects */
ret = nvws->notifier_alloc(nvws, 32, &screen->query);
if (ret) {
NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
nv40_screen_destroy(&screen->pipe);
return NULL;
}
ret = nvws->res_init(&screen->query_heap, 0, 32);
if (ret) {
NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
nv40_screen_destroy(&screen->pipe);
return NULL;
}
/* Vtxprog resources */
if (nvws->res_init(&screen->vp_exec_heap, 0, 512) ||
nvws->res_init(&screen->vp_data_heap, 0, 256)) {
nv40_screen_destroy(&screen->pipe);
return NULL;
}
/* Static curie initialisation */
so = so_new(128, 0);
so_method(so, screen->curie, NV40TCL_DMA_NOTIFY, 1);
so_data (so, screen->sync->handle);
so_method(so, screen->curie, NV40TCL_DMA_TEXTURE0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->gart->handle);
so_method(so, screen->curie, NV40TCL_DMA_COLOR1, 1);
so_data (so, nvws->channel->vram->handle);
so_method(so, screen->curie, NV40TCL_DMA_COLOR0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, screen->curie, NV40TCL_DMA_VTXBUF0, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->gart->handle);
so_method(so, screen->curie, NV40TCL_DMA_FENCE, 2);
so_data (so, 0);
so_data (so, screen->query->handle);
so_method(so, screen->curie, NV40TCL_DMA_UNK01AC, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, screen->curie, NV40TCL_DMA_COLOR2, 2);
so_data (so, nvws->channel->vram->handle);
so_data (so, nvws->channel->vram->handle);
so_method(so, screen->curie, 0x1ea4, 3);
so_data (so, 0x00000010);
so_data (so, 0x01000100);
so_data (so, 0xff800006);
/* vtxprog output routing */
so_method(so, screen->curie, 0x1fc4, 1);
so_data (so, 0x06144321);
so_method(so, screen->curie, 0x1fc8, 2);
so_data (so, 0xedcba987);
so_data (so, 0x00000021);
so_method(so, screen->curie, 0x1fd0, 1);
so_data (so, 0x00171615);
so_method(so, screen->curie, 0x1fd4, 1);
so_data (so, 0x001b1a19);
so_method(so, screen->curie, 0x1ef8, 1);
so_data (so, 0x0020ffff);
so_method(so, screen->curie, 0x1d64, 1);
so_data (so, 0x00d30000);
so_method(so, screen->curie, 0x1e94, 1);
so_data (so, 0x00000001);
so_emit(nvws, so);
so_ref(NULL, &so);
nvws->push_flush(nvws->channel, 0);
screen->pipe.winsys = ws;
screen->pipe.destroy = nv40_screen_destroy;
src/gallium/drivers/nv40/nv40_screen.h
+15
View File
@@ -8,6 +8,21 @@ struct nv40_screen {
struct nouveau_winsys *nvws;
unsigned chipset;
/* HW graphics objects */
struct nouveau_grobj *curie;
struct nouveau_notifier *sync;
/* Query object resources */
struct nouveau_notifier *query;
struct nouveau_resource *query_heap;
/* Vtxprog resources */
struct nouveau_resource *vp_exec_heap;
struct nouveau_resource *vp_data_heap;
/* Current 3D state of channel */
struct nouveau_stateobj *state[NV40_STATE_MAX];
};
static INLINE struct nv40_screen *
src/gallium/drivers/nv40/nv40_state.c
+8 -8
View File
@@ -10,7 +10,7 @@ nv40_blend_state_create(struct pipe_context *pipe,
const struct pipe_blend_state *cso)
{
struct nv40_context *nv40 = nv40_context(pipe);
struct nouveau_grobj *curie = nv40->hw->curie;
struct nouveau_grobj *curie = nv40->screen->curie;
struct nv40_blend_state *bso = CALLOC(1, sizeof(*bso));
struct nouveau_stateobj *so = so_new(16, 0);
@@ -286,7 +286,7 @@ nv40_rasterizer_state_create(struct pipe_context *pipe,
struct nv40_context *nv40 = nv40_context(pipe);
struct nv40_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso));
struct nouveau_stateobj *so = so_new(32, 0);
struct nouveau_grobj *curie = nv40->hw->curie;
struct nouveau_grobj *curie = nv40->screen->curie;
/*XXX: ignored:
* light_twoside
@@ -420,18 +420,18 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
struct nouveau_stateobj *so = so_new(32, 0);
so_method(so, nv40->hw->curie, NV40TCL_DEPTH_FUNC, 3);
so_method(so, nv40->screen->curie, NV40TCL_DEPTH_FUNC, 3);
so_data (so, nvgl_comparison_op(cso->depth.func));
so_data (so, cso->depth.writemask ? 1 : 0);
so_data (so, cso->depth.enabled ? 1 : 0);
so_method(so, nv40->hw->curie, NV40TCL_ALPHA_TEST_ENABLE, 3);
so_method(so, nv40->screen->curie, NV40TCL_ALPHA_TEST_ENABLE, 3);
so_data (so, cso->alpha.enabled ? 1 : 0);
so_data (so, nvgl_comparison_op(cso->alpha.func));
so_data (so, float_to_ubyte(cso->alpha.ref));
if (cso->stencil[0].enabled) {
so_method(so, nv40->hw->curie, NV40TCL_STENCIL_FRONT_ENABLE, 8);
so_method(so, nv40->screen->curie, NV40TCL_STENCIL_FRONT_ENABLE, 8);
so_data (so, cso->stencil[0].enabled ? 1 : 0);
so_data (so, cso->stencil[0].write_mask);
so_data (so, nvgl_comparison_op(cso->stencil[0].func));
@@ -441,12 +441,12 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
} else {
so_method(so, nv40->hw->curie, NV40TCL_STENCIL_FRONT_ENABLE, 1);
so_method(so, nv40->screen->curie, NV40TCL_STENCIL_FRONT_ENABLE, 1);
so_data (so, 0);
}
if (cso->stencil[1].enabled) {
so_method(so, nv40->hw->curie, NV40TCL_STENCIL_BACK_ENABLE, 8);
so_method(so, nv40->screen->curie, NV40TCL_STENCIL_BACK_ENABLE, 8);
so_data (so, cso->stencil[1].enabled ? 1 : 0);
so_data (so, cso->stencil[1].write_mask);
so_data (so, nvgl_comparison_op(cso->stencil[1].func));
@@ -456,7 +456,7 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
} else {
so_method(so, nv40->hw->curie, NV40TCL_STENCIL_BACK_ENABLE, 1);
so_method(so, nv40->screen->curie, NV40TCL_STENCIL_BACK_ENABLE, 1);
so_data (so, 0);
}
src/gallium/drivers/nv40/nv40_state_blend.c
+1 -1
View File
@@ -21,7 +21,7 @@ nv40_state_blend_colour_validate(struct nv40_context *nv40)
struct nouveau_stateobj *so = so_new(2, 0);
struct pipe_blend_color *bcol = &nv40->blend_colour;
so_method(so, nv40->hw->curie, NV40TCL_BLEND_COLOR, 1);
so_method(so, nv40->screen->curie, NV40TCL_BLEND_COLOR, 1);
so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) |
(float_to_ubyte(bcol->color[0]) << 16) |
(float_to_ubyte(bcol->color[1]) << 8) |
src/gallium/drivers/nv40/nv40_state_emit.c
+2 -2
View File
@@ -67,8 +67,8 @@ nv40_state_emit(struct nv40_context *nv40)
while (state->dirty) {
unsigned idx = ffsll(state->dirty) - 1;
so_ref (state->hw[idx], &nv40->hw->state[idx]);
so_emit(nv40->nvws, nv40->hw->state[idx]);
so_ref (state->hw[idx], &nv40->screen->state[idx]);
so_emit(nv40->nvws, nv40->screen->state[idx]);
state->dirty &= ~(1ULL << idx);
}
src/gallium/drivers/nv40/nv40_state_fb.c
+17 -17
View File
@@ -72,73 +72,73 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40)
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) {
so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR0, 1);
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR0, 1);
so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->hw->curie, NV40TCL_COLOR0_PITCH, 2);
so_method(so, nv40->screen->curie, NV40TCL_COLOR0_PITCH, 2);
so_data (so, rt[0]->pitch * rt[0]->cpp);
so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) {
so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR1, 1);
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR1, 1);
so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->hw->curie, NV40TCL_COLOR1_OFFSET, 2);
so_method(so, nv40->screen->curie, NV40TCL_COLOR1_OFFSET, 2);
so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_data (so, rt[1]->pitch * rt[1]->cpp);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) {
so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR2, 1);
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR2, 1);
so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->hw->curie, NV40TCL_COLOR2_OFFSET, 1);
so_method(so, nv40->screen->curie, NV40TCL_COLOR2_OFFSET, 1);
so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, nv40->hw->curie, NV40TCL_COLOR2_PITCH, 1);
so_method(so, nv40->screen->curie, NV40TCL_COLOR2_PITCH, 1);
so_data (so, rt[2]->pitch * rt[2]->cpp);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) {
so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR3, 1);
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR3, 1);
so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->hw->curie, NV40TCL_COLOR3_OFFSET, 1);
so_method(so, nv40->screen->curie, NV40TCL_COLOR3_OFFSET, 1);
so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, nv40->hw->curie, NV40TCL_COLOR3_PITCH, 1);
so_method(so, nv40->screen->curie, NV40TCL_COLOR3_PITCH, 1);
so_data (so, rt[3]->pitch * rt[3]->cpp);
}
if (zeta_format) {
so_method(so, nv40->hw->curie, NV40TCL_DMA_ZETA, 1);
so_method(so, nv40->screen->curie, NV40TCL_DMA_ZETA, 1);
so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->hw->curie, NV40TCL_ZETA_OFFSET, 1);
so_method(so, nv40->screen->curie, NV40TCL_ZETA_OFFSET, 1);
so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, nv40->hw->curie, NV40TCL_ZETA_PITCH, 1);
so_method(so, nv40->screen->curie, NV40TCL_ZETA_PITCH, 1);
so_data (so, zeta->pitch * zeta->cpp);
}
so_method(so, nv40->hw->curie, NV40TCL_RT_ENABLE, 1);
so_method(so, nv40->screen->curie, NV40TCL_RT_ENABLE, 1);
so_data (so, rt_enable);
so_method(so, nv40->hw->curie, NV40TCL_RT_HORIZ, 3);
so_method(so, nv40->screen->curie, NV40TCL_RT_HORIZ, 3);
so_data (so, (w << 16) | 0);
so_data (so, (h << 16) | 0);
so_data (so, rt_format);
so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_HORIZ, 2);
so_method(so, nv40->screen->curie, NV40TCL_VIEWPORT_HORIZ, 2);
so_data (so, (w << 16) | 0);
so_data (so, (h << 16) | 0);
so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
so_method(so, nv40->screen->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
so_data (so, ((w - 1) << 16) | 0);
so_data (so, ((h - 1) << 16) | 0);
src/gallium/drivers/nv40/nv40_state_scissor.c
+1 -1
View File
@@ -12,7 +12,7 @@ nv40_state_scissor_validate(struct nv40_context *nv40)
return FALSE;
so = so_new(3, 0);
so_method(so, nv40->hw->curie, NV40TCL_SCISSOR_HORIZ, 2);
so_method(so, nv40->screen->curie, NV40TCL_SCISSOR_HORIZ, 2);
if (rast->scissor) {
so_data (so, ((s->maxx - s->minx) << 16) | s->minx);
so_data (so, ((s->maxy - s->miny) << 16) | s->miny);
src/gallium/drivers/nv40/nv40_state_stipple.c
+1 -1
View File
@@ -4,7 +4,7 @@ static boolean
nv40_state_stipple_validate(struct nv40_context *nv40)
{
struct pipe_rasterizer_state *rast = &nv40->rasterizer->pipe;
struct nouveau_grobj *curie = nv40->hw->curie;
struct nouveau_grobj *curie = nv40->screen->curie;
struct nouveau_stateobj *so;
if (nv40->state.hw[NV40_STATE_STIPPLE] &&
src/gallium/drivers/nv40/nv40_state_viewport.c
+1 -1
View File
@@ -6,7 +6,7 @@ nv40_state_viewport_validate(struct nv40_context *nv40)
struct nouveau_stateobj *so = so_new(9, 0);
struct pipe_viewport_state *vpt = &nv40->viewport;
so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
so_method(so, nv40->screen->curie, NV40TCL_VIEWPORT_TRANSLATE_X, 8);
so_data (so, fui(vpt->translate[0]));
so_data (so, fui(vpt->translate[1]));
so_data (so, fui(vpt->translate[2]));
src/gallium/drivers/nv40/nv40_vbo.c
+5 -5
View File
@@ -52,7 +52,7 @@ nv40_vbo_set_idxbuf(struct nv40_context *nv40, struct pipe_buffer *ib,
}
/* No support for 8bit indices, no support at all on 0x4497 chips */
if (nv40->hw->curie->grclass == NV44TCL || ib_size == 1)
if (nv40->screen->curie->grclass == NV44TCL || ib_size == 1)
return FALSE;
switch (ib_size) {
@@ -365,9 +365,9 @@ nv40_vbo_validate(struct nv40_context *nv40)
num_hw++;
vtxbuf = so_new(20, 18);
so_method(vtxbuf, nv40->hw->curie, NV40TCL_VTXBUF_ADDRESS(0), num_hw);
so_method(vtxbuf, nv40->screen->curie, NV40TCL_VTXBUF_ADDRESS(0), num_hw);
vtxfmt = so_new(17, 0);
so_method(vtxfmt, nv40->hw->curie, NV40TCL_VTXFMT(0), num_hw);
so_method(vtxfmt, nv40->screen->curie, NV40TCL_VTXFMT(0), num_hw);
inputs = vp->ir;
for (hw = 0; hw < num_hw; hw++) {
@@ -399,13 +399,13 @@ nv40_vbo_validate(struct nv40_context *nv40)
}
if (ib) {
so_method(vtxbuf, nv40->hw->curie, NV40TCL_IDXBUF_ADDRESS, 2);
so_method(vtxbuf, nv40->screen->curie, NV40TCL_IDXBUF_ADDRESS, 2);
so_reloc (vtxbuf, ib, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (vtxbuf, ib, ib_format, vb_flags | NOUVEAU_BO_OR,
0, NV40TCL_IDXBUF_FORMAT_DMA1);
}
so_method(vtxbuf, nv40->hw->curie, 0x1710, 1);
so_method(vtxbuf, nv40->screen->curie, 0x1710, 1);
so_data (vtxbuf, 0);
so_ref(vtxbuf, &nv40->state.hw[NV40_STATE_VTXBUF]);
src/gallium/drivers/nv40/nv40_vertprog.c
+4 -4
View File
@@ -655,7 +655,7 @@ nv40_vertprog_validate(struct nv40_context *nv40)
check_gpu_resources:
/* Allocate hw vtxprog exec slots */
if (!vp->exec) {
struct nouveau_resource *heap = nv40->hw->vp_exec_heap;
struct nouveau_resource *heap = nv40->screen->vp_exec_heap;
struct nouveau_stateobj *so;
uint vplen = vp->nr_insns;
@@ -672,9 +672,9 @@ check_gpu_resources:
}
so = so_new(5, 0);
so_method(so, nv40->hw->curie, NV40TCL_VP_START_FROM_ID, 1);
so_method(so, nv40->screen->curie, NV40TCL_VP_START_FROM_ID, 1);
so_data (so, vp->exec->start);
so_method(so, nv40->hw->curie, NV40TCL_VP_ATTRIB_EN, 2);
so_method(so, nv40->screen->curie, NV40TCL_VP_ATTRIB_EN, 2);
so_data (so, vp->ir);
so_data (so, vp->or);
so_ref(so, &vp->so);
@@ -684,7 +684,7 @@ check_gpu_resources:
/* Allocate hw vtxprog const slots */
if (vp->nr_consts && !vp->data) {
struct nouveau_resource *heap = nv40->hw->vp_data_heap;
struct nouveau_resource *heap = nv40->screen->vp_data_heap;
if (nvws->res_alloc(heap, vp->nr_consts, vp, &vp->data)) {
while (heap->next && heap->size < vp->nr_consts) {