add sync debugging to the radeon driver

src/mesa/drivers/dri/radeon/radeon_context.c

@@ -201,6 +201,7 @@ static const struct dri_debug_control debug_control[] =
     { "dri",   DEBUG_DRI },
     { "dma",   DEBUG_DMA },
     { "san",   DEBUG_SANITY },
+    { "sync",  DEBUG_SYNC },
     { NULL,    0 }
 };
 

src/mesa/drivers/dri/radeon/radeon_context.h

@@ -848,6 +848,7 @@ extern int RADEON_DEBUG;
 #define DEBUG_DRI       0x200
 #define DEBUG_DMA       0x400
 #define DEBUG_SANITY    0x800
+#define DEBUG_SYNC     0x1000
 
 #endif
 #endif /* __RADEON_CONTEXT_H__ */

src/mesa/drivers/dri/radeon/radeon_ioctl.c

@@ -310,6 +310,11 @@ void radeonFlushElts( radeonContextPtr rmesa )
    cmd[1] |= (dwords - 3) << 16;
    cmd[3] |= nr << RADEON_CP_VC_CNTL_NUM_SHIFT;
 #endif
+
+   if (RADEON_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
+      radeonFinish( rmesa->glCtx );
+   }
 }
 
 
@@ -580,6 +585,11 @@ static int radeonFlushCmdBufLocked( radeonContextPtr rmesa,
    if (ret)
       fprintf(stderr, "drmCommandWrite: %d\n", ret);
 
+   if (RADEON_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "\nSyncing in %s\n\n", __FUNCTION__);
+      radeonWaitForIdleLocked( rmesa );
+   }
+
  out:
    rmesa->store.primnr = 0;
    rmesa->store.statenr = 0;

src/mesa/drivers/dri/radeon/radeon_texmem.c

@@ -322,6 +322,11 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac
    if ( !t || t->base.totalSize == 0 )
       return 0;
 
+   if (RADEON_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "%s: Syncing\n", __FUNCTION__ );
+      radeonFinish( rmesa->glCtx );
+   }
+
    LOCK_HARDWARE( rmesa );
 
    if ( t->base.memBlock == NULL ) {
@@ -364,5 +369,10 @@ int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint fac
       t->base.dirty_images[face] = 0;
    }
 
+   if (RADEON_DEBUG & DEBUG_SYNC) {
+      fprintf(stderr, "%s: Syncing\n", __FUNCTION__ );
+      radeonFinish( rmesa->glCtx );
+   }
+
    return 0;
 }