rusticl: implement cl_khr_pci_bus_info

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23022>

src/gallium/frontends/rusticl/api/device.rs

@@ -146,6 +146,9 @@ impl CLInfo<cl_device_info> for cl_device_id {
             CL_DEVICE_PARTITION_MAX_SUB_DEVICES => cl_prop::<cl_uint>(0),
             CL_DEVICE_PARTITION_PROPERTIES => cl_prop::<Vec<cl_device_partition_property>>(vec![0]),
             CL_DEVICE_PARTITION_TYPE => cl_prop::<Vec<cl_device_partition_property>>(Vec::new()),
+            CL_DEVICE_PCI_BUS_INFO_KHR => {
+                cl_prop::<cl_device_pci_bus_info_khr>(dev.pci_info().ok_or(CL_INVALID_VALUE)?)
+            }
             CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS => cl_prop::<cl_uint>(0),
             CL_DEVICE_PIPE_MAX_PACKET_SIZE => cl_prop::<cl_uint>(0),
             CL_DEVICE_PIPE_SUPPORT => cl_prop::<bool>(false),

src/gallium/frontends/rusticl/api/util.rs

@@ -124,6 +124,7 @@ cl_prop_for_type!(cl_ulong);
 cl_prop_for_type!(isize);
 cl_prop_for_type!(usize);
 
+cl_prop_for_struct!(cl_device_pci_bus_info_khr);
 cl_prop_for_struct!(cl_image_format);
 cl_prop_for_struct!(cl_name_version);
 

src/gallium/frontends/rusticl/core/device.rs

@@ -525,6 +525,10 @@ impl Device {
             }
         }
 
+        if self.pci_info().is_some() {
+            add_ext(1, 0, 0, "cl_khr_pci_bus_info", "");
+        }
+
         if self.svm_supported() {
             add_ext(1, 0, 0, "cl_arm_shared_virtual_memory", "");
         }
@@ -745,6 +749,24 @@ impl Device {
         1024 * 1024
     }
 
+    pub fn pci_info(&self) -> Option<cl_device_pci_bus_info_khr> {
+        if self.screen.device_type() != pipe_loader_device_type::PIPE_LOADER_DEVICE_PCI {
+            return None;
+        }
+
+        let pci_domain = self.screen.param(pipe_cap::PIPE_CAP_PCI_GROUP) as cl_uint;
+        let pci_bus = self.screen.param(pipe_cap::PIPE_CAP_PCI_BUS) as cl_uint;
+        let pci_device = self.screen.param(pipe_cap::PIPE_CAP_PCI_DEVICE) as cl_uint;
+        let pci_function = self.screen.param(pipe_cap::PIPE_CAP_PCI_FUNCTION) as cl_uint;
+
+        Some(cl_device_pci_bus_info_khr {
+            pci_domain,
+            pci_bus,
+            pci_device,
+            pci_function,
+        })
+    }
+
     pub fn screen(&self) -> &Arc<PipeScreen> {
         &self.screen
     }