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radeonsi: Use llvm.amdgcn.mbcnt.* intrinsics instead of llvm.SI.tid

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We're trying to move to more of the new style intrinsics with include
the correct target name, and map directly to ISA instructions.

v2:
  - Only do this with LLVM 3.8 and newer.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Tom Stellard
2016-04-15 22:53:38 +00:00
parent d3427412a3
commit 128267d781
1 changed files with 16 additions and 1 deletions
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src/gallium/drivers/radeonsi/si_shader.c
+16 -1
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@@ -1141,8 +1141,23 @@ static void set_range_metadata(LLVMValueRef value, unsigned lo, unsigned hi)
static LLVMValueRef get_thread_id(struct si_shader_context *ctx)
{
struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm;
LLVMValueRef tid = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid",
LLVMValueRef tid;
if (HAVE_LLVM < 0x0308) {
tid = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid",
ctx->i32, NULL, 0, LLVMReadNoneAttribute);
} else {
LLVMValueRef tid_args[2];
tid_args[0] = lp_build_const_int32(gallivm, 0xffffffff);
tid_args[1] = lp_build_const_int32(gallivm, 0);
tid_args[1] = lp_build_intrinsic(gallivm->builder,
"llvm.amdgcn.mbcnt.lo", ctx->i32,
tid_args, 2, LLVMReadNoneAttribute);
tid = lp_build_intrinsic(gallivm->builder,
"llvm.amdgcn.mbcnt.hi", ctx->i32,
tid_args, 2, LLVMReadNoneAttribute);
}
set_range_metadata(tid, 0, 64);
return tid;
}