pan/desc: Add a struct for valhall/bifrost to the union in pan_tiler_context

Valhall has extra tiler parameters for multilayer rendering that we will
need for the framebuffer descriptor emission. Let's add proper struct
for Valhall and Bifrost instead of assuming a mali_ptr is all we'll ever
need.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: John Anthony <john.anthony@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30969>

src/gallium/drivers/panfrost/pan_csf.c

@@ -494,8 +494,8 @@ GENX(csf_emit_fragment_job)(struct panfrost_batch *batch,
     * chunks is in the tiler context descriptor
     * (completed_{top,bottom fields}). */
    if (batch->draw_count > 0) {
-      assert(batch->tiler_ctx.bifrost);
-      cs_move64_to(b, cs_reg64(b, 90), batch->tiler_ctx.bifrost);
+      assert(batch->tiler_ctx.valhall.desc);
+      cs_move64_to(b, cs_reg64(b, 90), batch->tiler_ctx.valhall.desc);
       cs_load_to(b, cs_reg_tuple(b, 86, 4), cs_reg64(b, 90), BITFIELD_MASK(4),
                  40);
       cs_wait_slot(b, 0, false);
@@ -683,8 +683,8 @@ csf_get_tiler_desc(struct panfrost_batch *batch)
    struct panfrost_context *ctx = batch->ctx;
    struct panfrost_device *dev = pan_device(ctx->base.screen);
 
-   if (batch->tiler_ctx.bifrost)
-      return batch->tiler_ctx.bifrost;
+   if (batch->tiler_ctx.valhall.desc)
+      return batch->tiler_ctx.valhall.desc;
 
    struct panfrost_ptr t =
       pan_pool_alloc_desc(&batch->pool.base, TILER_CONTEXT);
@@ -714,8 +714,8 @@ csf_get_tiler_desc(struct panfrost_batch *batch)
       tiler.geometry_buffer_size = ctx->csf.tmp_geom_bo->kmod_bo->size;
    }
 
-   batch->tiler_ctx.bifrost = t.gpu;
-   return batch->tiler_ctx.bifrost;
+   batch->tiler_ctx.valhall.desc = t.gpu;
+   return batch->tiler_ctx.valhall.desc;
 }
 
 static uint32_t

src/gallium/drivers/panfrost/pan_jm.c

@@ -387,9 +387,11 @@ static mali_ptr
 jm_emit_tiler_desc(struct panfrost_batch *batch)
 {
    struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
+   mali_ptr tiler_desc = PAN_ARCH >= 9 ? batch->tiler_ctx.bifrost.desc
+                                       : batch->tiler_ctx.valhall.desc;
 
-   if (batch->tiler_ctx.bifrost)
-      return batch->tiler_ctx.bifrost;
+   if (tiler_desc)
+      return tiler_desc;
 
    struct panfrost_ptr t = pan_pool_alloc_desc(&batch->pool.base, TILER_HEAP);
 
@@ -428,8 +430,12 @@ jm_emit_tiler_desc(struct panfrost_batch *batch)
 #endif
    }
 
-   batch->tiler_ctx.bifrost = t.gpu;
-   return batch->tiler_ctx.bifrost;
+   if (PAN_ARCH >= 9)
+      batch->tiler_ctx.valhall.desc = t.gpu;
+   else
+      batch->tiler_ctx.bifrost.desc = t.gpu;
+
+   return t.gpu;
 }
 #endif
 

src/panfrost/lib/pan_desc.c

@@ -751,7 +751,8 @@ GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx,
       cfg.post_frame = pan_fix_frame_shader_mode(fb->bifrost.pre_post.modes[2],
                                                  force_clean_write);
       cfg.frame_shader_dcds = fb->bifrost.pre_post.dcds.gpu;
-      cfg.tiler = tiler_ctx->bifrost;
+      cfg.tiler =
+         PAN_ARCH >= 9 ? tiler_ctx->valhall.desc : tiler_ctx->bifrost.desc;
 #endif
       cfg.width = fb->width;
       cfg.height = fb->height;

src/panfrost/lib/pan_desc.h

@@ -76,7 +76,12 @@ struct pan_tiler_context {
    uint32_t vertex_count;
 
    union {
-      mali_ptr bifrost;
+      struct {
+         mali_ptr desc;
+      } valhall;
+      struct {
+         mali_ptr desc;
+      } bifrost;
       struct {
          bool disable;
          bool no_hierarchical_tiling;

src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c

@@ -213,9 +213,13 @@ panvk_per_arch(cmd_prepare_tiler_context)(struct panvk_cmd_buffer *cmdbuf,
 {
    struct panvk_device *dev = to_panvk_device(cmdbuf->vk.base.device);
    struct panvk_batch *batch = cmdbuf->cur_batch;
+   mali_ptr tiler_desc;
 
-   if (batch->tiler.ctx_descs.cpu)
+   if (batch->tiler.ctx_descs.gpu) {
+      tiler_desc =
+         batch->tiler.ctx_descs.gpu + (pan_size(TILER_CONTEXT) * layer_idx);
       goto out_set_layer_ctx;
+   }
 
    const struct pan_fb_info *fbinfo = &cmdbuf->state.gfx.render.fb.info;
    uint32_t layer_count = cmdbuf->state.gfx.render.layer_count;
@@ -225,6 +229,9 @@ panvk_per_arch(cmd_prepare_tiler_context)(struct panvk_cmd_buffer *cmdbuf,
    batch->tiler.ctx_descs = pan_pool_alloc_desc_array(
       &cmdbuf->desc_pool.base, layer_count, TILER_CONTEXT);
 
+   tiler_desc =
+      batch->tiler.ctx_descs.gpu + (pan_size(TILER_CONTEXT) * layer_idx);
+
    pan_pack(&batch->tiler.heap_templ, TILER_HEAP, cfg) {
       cfg.size = pan_kmod_bo_size(dev->tiler_heap->bo);
       cfg.base = dev->tiler_heap->addr.dev;
@@ -254,8 +261,10 @@ panvk_per_arch(cmd_prepare_tiler_context)(struct panvk_cmd_buffer *cmdbuf,
    }
 
 out_set_layer_ctx:
-   batch->tiler.ctx.bifrost =
-      batch->tiler.ctx_descs.gpu + (pan_size(TILER_CONTEXT) * layer_idx);
+   if (PAN_ARCH >= 9)
+      batch->tiler.ctx.valhall.desc = tiler_desc;
+   else
+      batch->tiler.ctx.bifrost.desc = tiler_desc;
 }
 
 struct panvk_batch *

src/panfrost/vulkan/jm/panvk_vX_cmd_draw.c

@@ -1038,7 +1038,8 @@ panvk_draw_prepare_tiler_job(struct panvk_cmd_buffer *cmdbuf,
                         pan_section_ptr(ptr.cpu, TILER_JOB, DRAW));
 
    pan_section_pack(ptr.cpu, TILER_JOB, TILER, cfg) {
-      cfg.address = draw->tiler_ctx->bifrost;
+      cfg.address = PAN_ARCH >= 9 ? draw->tiler_ctx->valhall.desc
+                                  : draw->tiler_ctx->bifrost.desc;
    }
 
    pan_section_pack(ptr.cpu, TILER_JOB, PADDING, padding)
@@ -1067,7 +1068,8 @@ panvk_draw_prepare_idvs_job(struct panvk_cmd_buffer *cmdbuf,
       pan_section_ptr(ptr.cpu, INDEXED_VERTEX_JOB, PRIMITIVE_SIZE));
 
    pan_section_pack(ptr.cpu, INDEXED_VERTEX_JOB, TILER, cfg) {
-      cfg.address = draw->tiler_ctx->bifrost;
+      cfg.address = PAN_ARCH >= 9 ? draw->tiler_ctx->valhall.desc
+                                  : draw->tiler_ctx->bifrost.desc;
    }
 
    pan_section_pack(ptr.cpu, INDEXED_VERTEX_JOB, PADDING, _) {