AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

all: rename PIPE_SHADER_FRAGMENT to MESA_SHADER_FRAGMENT

Browse Source 
Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/PIPE_SHADER_FRAGMENT/MESA_SHADER_FRAGMENT/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
This commit is contained in:
Qiang Yu
2025-08-05 13:48:10 +08:00
parent f83e801fc0
commit 11027dd3f8
192 changed files with 711 additions and 711 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/asahi/lib/agx_usc.h
+1 -1
View File
@@ -84,7 +84,7 @@ agx_usc_shared_non_fragment(struct agx_usc_builder *b,
const struct agx_shader_info *info,
unsigned variable_shared_mem)
{
if (info->stage != PIPE_SHADER_FRAGMENT) {
if (info->stage != MESA_SHADER_FRAGMENT) {
agx_usc_shared(b, info->local_size, info->imageblock_stride,
variable_shared_mem);
}
src/asahi/vulkan/hk_cmd_buffer.c
+1 -1
View File
@@ -645,7 +645,7 @@ hk_reserve_scratch(struct hk_cmd_buffer *cmd, struct hk_cs *cs,
_mesa_shader_stage_to_abbrev(s->b.info.stage));
switch (s->b.info.stage) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
cs->scratch.fs.main = true;
cs->scratch.fs.preamble = MAX2(cs->scratch.fs.preamble, preamble_size);
break;
src/asahi/vulkan/hk_device.h
+1 -1
View File
@@ -142,7 +142,7 @@ hk_device_scratch_locked(struct hk_device *dev, enum pipe_shader_type stage)
simple_mtx_assert_locked(&dev->scratch.lock);
switch (stage) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
return &dev->scratch.fs;
case MESA_SHADER_VERTEX:
return &dev->scratch.vs;
src/gallium/auxiliary/cso_cache/cso_context.c
+9 -9
View File
@@ -338,7 +338,7 @@ cso_create_context(struct pipe_context *pipe, unsigned flags)
ctx->sampler_format = true;
ctx->max_fs_samplerviews =
pipe->screen->shader_caps[PIPE_SHADER_FRAGMENT].max_texture_samplers;
pipe->screen->shader_caps[MESA_SHADER_FRAGMENT].max_texture_samplers;
ctx->max_sampler_seen = -1;
return &ctx->base;
@@ -420,7 +420,7 @@ cso_unbind_context(struct cso_context *cso)
struct pipe_stencil_ref sr = {0};
ctx->base.pipe->set_stencil_ref(ctx->base.pipe, sr);
ctx->base.pipe->bind_fs_state(ctx->base.pipe, NULL);
ctx->base.pipe->set_constant_buffer(ctx->base.pipe, PIPE_SHADER_FRAGMENT, 0, false, NULL);
ctx->base.pipe->set_constant_buffer(ctx->base.pipe, MESA_SHADER_FRAGMENT, 0, false, NULL);
ctx->base.pipe->bind_vs_state(ctx->base.pipe, NULL);
ctx->base.pipe->set_constant_buffer(ctx->base.pipe, MESA_SHADER_VERTEX, 0, false, NULL);
if (ctx->has_geometry_shader) {
@@ -1526,7 +1526,7 @@ cso_set_samplers(struct cso_context *cso,
static void
cso_save_fragment_samplers(struct cso_context_priv *ctx)
{
struct sampler_info *info = &ctx->samplers[PIPE_SHADER_FRAGMENT];
struct sampler_info *info = &ctx->samplers[MESA_SHADER_FRAGMENT];
struct sampler_info *saved = &ctx->fragment_samplers_saved;
memcpy(saved->cso_samplers, info->cso_samplers,
@@ -1538,7 +1538,7 @@ cso_save_fragment_samplers(struct cso_context_priv *ctx)
static void
cso_restore_fragment_samplers(struct cso_context_priv *ctx)
{
struct sampler_info *info = &ctx->samplers[PIPE_SHADER_FRAGMENT];
struct sampler_info *info = &ctx->samplers[MESA_SHADER_FRAGMENT];
struct sampler_info *saved = &ctx->fragment_samplers_saved;
memcpy(info->cso_samplers, saved->cso_samplers,
@@ -1552,7 +1552,7 @@ cso_restore_fragment_samplers(struct cso_context_priv *ctx)
}
}
cso_single_sampler_done(&ctx->base, PIPE_SHADER_FRAGMENT);
cso_single_sampler_done(&ctx->base, MESA_SHADER_FRAGMENT);
}
@@ -1726,15 +1726,15 @@ cso_restore_state(struct cso_context *ctx, unsigned unbind)
if (state_mask & CSO_BIT_VERTEX_SHADER)
cso_restore_vertex_shader(cso);
if (unbind & CSO_UNBIND_FS_SAMPLERVIEWS)
cso->base.pipe->set_sampler_views(cso->base.pipe, PIPE_SHADER_FRAGMENT, 0, 0,
cso->base.pipe->set_sampler_views(cso->base.pipe, MESA_SHADER_FRAGMENT, 0, 0,
cso->max_fs_samplerviews, NULL);
if (unbind & CSO_UNBIND_FS_SAMPLERVIEW0)
cso->base.pipe->set_sampler_views(cso->base.pipe, PIPE_SHADER_FRAGMENT, 0, 0,
cso->base.pipe->set_sampler_views(cso->base.pipe, MESA_SHADER_FRAGMENT, 0, 0,
1, NULL);
if (state_mask & CSO_BIT_FRAGMENT_SAMPLERS)
cso_restore_fragment_samplers(cso);
if (unbind & CSO_UNBIND_FS_IMAGE0)
cso->base.pipe->set_shader_images(cso->base.pipe, PIPE_SHADER_FRAGMENT, 0, 0, 1, NULL);
cso->base.pipe->set_shader_images(cso->base.pipe, MESA_SHADER_FRAGMENT, 0, 0, 1, NULL);
if (state_mask & CSO_BIT_FRAMEBUFFER)
cso_restore_framebuffer(cso);
if (state_mask & CSO_BIT_BLEND)
@@ -1752,7 +1752,7 @@ cso_restore_state(struct cso_context *ctx, unsigned unbind)
if (unbind & CSO_UNBIND_VS_CONSTANTS)
cso->base.pipe->set_constant_buffer(cso->base.pipe, MESA_SHADER_VERTEX, 0, false, NULL);
if (unbind & CSO_UNBIND_FS_CONSTANTS)
cso->base.pipe->set_constant_buffer(cso->base.pipe, PIPE_SHADER_FRAGMENT, 0, false, NULL);
cso->base.pipe->set_constant_buffer(cso->base.pipe, MESA_SHADER_FRAGMENT, 0, false, NULL);
if (state_mask & CSO_BIT_VERTEX_ELEMENTS)
cso_restore_vertex_elements(cso);
if (state_mask & CSO_BIT_STREAM_OUTPUTS)
src/gallium/auxiliary/draw/draw_pipe_pstipple.c
+6 -6
View File
@@ -220,10 +220,10 @@ pstip_first_tri(struct draw_stage *stage, struct prim_header *header)
draw->suspend_flushing = true;
pstip->driver_bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, 0,
pstip->driver_bind_sampler_states(pipe, MESA_SHADER_FRAGMENT, 0,
num_samplers, pstip->state.samplers);
pstip->driver_set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0,
pstip->driver_set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0,
num_sampler_views, 0,
pstip->state.sampler_views);
@@ -249,11 +249,11 @@ pstip_flush(struct draw_stage *stage, unsigned flags)
draw->suspend_flushing = true;
pstip->driver_bind_fs_state(pipe, pstip->fs ? pstip->fs->driver_fs : NULL);
pstip->driver_bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, 0,
pstip->driver_bind_sampler_states(pipe, MESA_SHADER_FRAGMENT, 0,
pstip->num_samplers,
pstip->state.samplers);
pstip->driver_set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0,
pstip->driver_set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0,
pstip->num_sampler_views, 0,
pstip->state.sampler_views);
@@ -396,7 +396,7 @@ pstip_bind_sampler_states(struct pipe_context *pipe,
assert(start == 0);
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
/* save current */
memcpy(pstip->state.samplers, sampler, num * sizeof(void *));
for (unsigned i = num; i < PIPE_MAX_SAMPLERS; i++) {
@@ -419,7 +419,7 @@ pstip_set_sampler_views(struct pipe_context *pipe,
{
struct pstip_stage *pstip = pstip_stage_from_pipe(pipe);
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
/* save current */
unsigned i;
for (i = 0; i < num; i++) {
src/gallium/auxiliary/driver_ddebug/dd_draw.c
+2 -2
View File
@@ -268,7 +268,7 @@ dd_dump_shader(struct dd_draw_state *dstate, enum pipe_shader_type sh, FILE *f)
shader_str[MESA_SHADER_TESS_CTRL] = "TESS_CTRL";
shader_str[MESA_SHADER_TESS_EVAL] = "TESS_EVAL";
shader_str[MESA_SHADER_GEOMETRY] = "GEOMETRY";
shader_str[PIPE_SHADER_FRAGMENT] = "FRAGMENT";
shader_str[MESA_SHADER_FRAGMENT] = "FRAGMENT";
shader_str[PIPE_SHADER_COMPUTE] = "COMPUTE";
if (sh == MESA_SHADER_TESS_CTRL &&
@@ -283,7 +283,7 @@ dd_dump_shader(struct dd_draw_state *dstate, enum pipe_shader_type sh, FILE *f)
dstate->tess_default_levels[4],
dstate->tess_default_levels[5]);
if (sh == PIPE_SHADER_FRAGMENT)
if (sh == MESA_SHADER_FRAGMENT)
if (dstate->rs) {
unsigned num_viewports = dd_num_active_viewports(dstate);
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+3 -3
View File
@@ -2051,7 +2051,7 @@ lp_build_lod_property(
reg->Register.File == TGSI_FILE_IMMEDIATE) {
lod_property = LP_SAMPLER_LOD_SCALAR;
}
else if (bld_base->info->processor == PIPE_SHADER_FRAGMENT) {
else if (bld_base->info->processor == MESA_SHADER_FRAGMENT) {
if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD) {
lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
}
@@ -2243,7 +2243,7 @@ emit_tex( struct lp_build_tgsi_soa_context *bld,
* could also check all src regs if constant but I doubt such
* cases exist in practice.
*/
if (bld->bld_base.info->processor == PIPE_SHADER_FRAGMENT) {
if (bld->bld_base.info->processor == MESA_SHADER_FRAGMENT) {
if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD) {
lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
}
@@ -2412,7 +2412,7 @@ emit_sample(struct lp_build_tgsi_soa_context *bld,
* could also check all src regs if constant but I doubt such
* cases exist in practice.
*/
if (bld->bld_base.info->processor == PIPE_SHADER_FRAGMENT) {
if (bld->bld_base.info->processor == MESA_SHADER_FRAGMENT) {
if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD) {
lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
}
src/gallium/auxiliary/hud/hud_context.c
+2 -2
View File
@@ -577,9 +577,9 @@ hud_draw_results(struct hud_context *hud, struct pipe_resource *tex)
cso_set_vertex_shader_handle(cso, hud->vs_color);
cso_set_vertex_elements(cso, &hud->velems);
cso_set_render_condition(cso, NULL, false, 0);
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0,
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0,
&hud->font_sampler_view);
cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, 1, sampler_states);
cso_set_samplers(cso, MESA_SHADER_FRAGMENT, 1, sampler_states);
pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &hud->constbuf);
/* draw accumulated vertices for background quads */
src/gallium/auxiliary/nir/nir_to_tgsi_info.c
+2 -2
View File
@@ -561,7 +561,7 @@ void nir_tgsi_scan_shader(const struct nir_shader *nir,
info->writes_edgeflag = true;
break;
case TGSI_SEMANTIC_POSITION:
if (info->processor == PIPE_SHADER_FRAGMENT) {
if (info->processor == MESA_SHADER_FRAGMENT) {
if (!variable->data.fb_fetch_output)
info->writes_z = true;
} else {
@@ -632,7 +632,7 @@ void nir_tgsi_scan_shader(const struct nir_shader *nir,
info->num_written_clipdistance = nir->info.clip_distance_array_size;
info->num_written_culldistance = nir->info.cull_distance_array_size;
if (info->processor == PIPE_SHADER_FRAGMENT)
if (info->processor == MESA_SHADER_FRAGMENT)
info->uses_kill = nir->info.fs.uses_discard;
nir_function *func = (struct nir_function *)
src/gallium/auxiliary/nir/tgsi_to_nir.c
+6 -6
View File
@@ -303,7 +303,7 @@ ttn_emit_declaration(struct ttn_compile *c)
var->data.mode = nir_var_shader_in;
nir_variable_set_namef(b->shader, var, "in_%d", idx);
if (c->scan->processor == PIPE_SHADER_FRAGMENT) {
if (c->scan->processor == MESA_SHADER_FRAGMENT) {
if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
var->type = glsl_bool_type();
if (c->cap_face_is_sysval) {
@@ -367,7 +367,7 @@ ttn_emit_declaration(struct ttn_compile *c)
semantic_name == TGSI_SEMANTIC_TESSOUTER ||
semantic_name == TGSI_SEMANTIC_PATCH;
if (c->scan->processor == PIPE_SHADER_FRAGMENT) {
if (c->scan->processor == MESA_SHADER_FRAGMENT) {
switch (semantic_name) {
case TGSI_SEMANTIC_COLOR: {
/* TODO tgsi loses some information, so we cannot
@@ -646,15 +646,15 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
}
case TGSI_FILE_INPUT:
if (c->scan->processor == PIPE_SHADER_FRAGMENT &&
if (c->scan->processor == MESA_SHADER_FRAGMENT &&
c->scan->input_semantic_name[index] == TGSI_SEMANTIC_FACE) {
assert(!c->cap_face_is_sysval && c->input_var_face);
return nir_src_for_ssa(ttn_emulate_tgsi_front_face(c));
} else if (c->scan->processor == PIPE_SHADER_FRAGMENT &&
} else if (c->scan->processor == MESA_SHADER_FRAGMENT &&
c->scan->input_semantic_name[index] == TGSI_SEMANTIC_POSITION) {
assert(!c->cap_position_is_sysval && c->input_var_position);
return nir_src_for_ssa(nir_load_var(&c->build, c->input_var_position));
} else if (c->scan->processor == PIPE_SHADER_FRAGMENT &&
} else if (c->scan->processor == MESA_SHADER_FRAGMENT &&
c->scan->input_semantic_name[index] == TGSI_SEMANTIC_PCOORD) {
assert(!c->cap_point_is_sysval && c->input_var_point);
return nir_src_for_ssa(nir_load_var(&c->build, c->input_var_point));
@@ -668,7 +668,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
break;
case TGSI_FILE_OUTPUT:
if (c->scan->processor == PIPE_SHADER_FRAGMENT) {
if (c->scan->processor == MESA_SHADER_FRAGMENT) {
c->outputs[index]->data.fb_fetch_output = 1;
nir_deref_instr *deref = nir_build_deref_var(&c->build,
c->outputs[index]);
src/gallium/auxiliary/postprocess/pp_colors.c
+2 -2
View File
@@ -46,8 +46,8 @@ pp_nocolor(struct pp_queue_t *ppq, struct pipe_resource *in,
pp_filter_set_fb(p);
pp_filter_misc_state(p);
cso_set_samplers(p->cso, PIPE_SHADER_FRAGMENT, 1, samplers);
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0, &p->view);
cso_set_samplers(p->cso, MESA_SHADER_FRAGMENT, 1, samplers);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0, &p->view);
cso_set_vertex_shader_handle(p->cso, ppq->shaders[n][0]);
cso_set_fragment_shader_handle(p->cso, ppq->shaders[n][1]);
src/gallium/auxiliary/postprocess/pp_mlaa.c
+7 -7
View File
@@ -105,7 +105,7 @@ pp_jimenezmlaa_run(struct pp_queue_t *ppq, struct pipe_resource *in,
struct pipe_context *pipe = ppq->p->pipe;
pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &cb);
pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, false, &cb);
pipe->set_constant_buffer(pipe, MESA_SHADER_FRAGMENT, 0, false, &cb);
mstencil.stencil[0].enabled = 1;
mstencil.stencil[0].valuemask = mstencil.stencil[0].writemask = ~0;
@@ -132,9 +132,9 @@ pp_jimenezmlaa_run(struct pp_queue_t *ppq, struct pipe_resource *in,
{
const struct pipe_sampler_state *samplers[] = {&p->sampler_point};
cso_set_samplers(p->cso, PIPE_SHADER_FRAGMENT, 1, samplers);
cso_set_samplers(p->cso, MESA_SHADER_FRAGMENT, 1, samplers);
}
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0, &p->view);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0, &p->view);
cso_set_vertex_shader_handle(p->cso, ppq->shaders[n][1]); /* offsetvs */
cso_set_fragment_shader_handle(p->cso, ppq->shaders[n][2]);
@@ -162,11 +162,11 @@ pp_jimenezmlaa_run(struct pp_queue_t *ppq, struct pipe_resource *in,
{
const struct pipe_sampler_state *samplers[] =
{&p->sampler_point, &p->sampler_point, &p->sampler};
cso_set_samplers(p->cso, PIPE_SHADER_FRAGMENT, 3, samplers);
cso_set_samplers(p->cso, MESA_SHADER_FRAGMENT, 3, samplers);
}
arr[0] = p->view;
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 3, 0, arr);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 3, 0, arr);
cso_set_vertex_shader_handle(p->cso, ppq->shaders[n][0]); /* passvs */
cso_set_fragment_shader_handle(p->cso, ppq->shaders[n][3]);
@@ -193,11 +193,11 @@ pp_jimenezmlaa_run(struct pp_queue_t *ppq, struct pipe_resource *in,
{
const struct pipe_sampler_state *samplers[] =
{&p->sampler_point, &p->sampler_point};
cso_set_samplers(p->cso, PIPE_SHADER_FRAGMENT, 2, samplers);
cso_set_samplers(p->cso, MESA_SHADER_FRAGMENT, 2, samplers);
}
arr[1] = p->view;
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 2, 0, arr);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 2, 0, arr);
cso_set_vertex_shader_handle(p->cso, ppq->shaders[n][1]); /* offsetvs */
cso_set_fragment_shader_handle(p->cso, ppq->shaders[n][4]);
src/gallium/auxiliary/tgsi/tgsi_dump.c
+1 -1
View File
@@ -425,7 +425,7 @@ iter_declaration(
}
if (decl->Declaration.Interpolate) {
if (iter->processor.Processor == PIPE_SHADER_FRAGMENT &&
if (iter->processor.Processor == MESA_SHADER_FRAGMENT &&
decl->Declaration.File == TGSI_FILE_INPUT)
{
TXT( ", " );
src/gallium/auxiliary/tgsi/tgsi_exec.c
+3 -3
View File
@@ -1227,7 +1227,7 @@ tgsi_exec_machine_create(enum pipe_shader_type shader_type)
goto fail;
}
if (shader_type == PIPE_SHADER_FRAGMENT) {
if (shader_type == MESA_SHADER_FRAGMENT) {
mach->InputSampleOffsetApply = align_malloc(sizeof(apply_sample_offset_func) * PIPE_MAX_SHADER_INPUTS, 16);
if (!mach->InputSampleOffsetApply)
goto fail;
@@ -2774,7 +2774,7 @@ exec_declaration(struct tgsi_exec_machine *mach,
return;
}
if (mach->ShaderType == PIPE_SHADER_FRAGMENT) {
if (mach->ShaderType == MESA_SHADER_FRAGMENT) {
if (decl->Declaration.File == TGSI_FILE_INPUT) {
unsigned first, last, mask;
@@ -6076,7 +6076,7 @@ tgsi_exec_machine_run( struct tgsi_exec_machine *mach, int start_pc )
#if 0
/* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
if (mach->ShaderType == PIPE_SHADER_FRAGMENT) {
if (mach->ShaderType == MESA_SHADER_FRAGMENT) {
/*
* Scale back depth component.
*/
src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
+1 -1
View File
@@ -62,7 +62,7 @@ static inline enum pipe_shader_type
pipe_shader_type_from_mesa(gl_shader_stage stage)
{
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_VERTEX == MESA_SHADER_VERTEX);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_FRAGMENT == PIPE_SHADER_FRAGMENT);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_FRAGMENT == MESA_SHADER_FRAGMENT);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_CTRL == MESA_SHADER_TESS_CTRL);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_EVAL == MESA_SHADER_TESS_EVAL);
STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_GEOMETRY == MESA_SHADER_GEOMETRY);
src/gallium/auxiliary/tgsi/tgsi_lowering.c
+1 -1
View File
@@ -1448,7 +1448,7 @@ tgsi_transform_lowering(const struct tgsi_lowering_config *config,
* color, then figure out the number of additional inputs we need
* to create for BCOLOR's..
*/
if ((info->processor == PIPE_SHADER_FRAGMENT) &&
if ((info->processor == MESA_SHADER_FRAGMENT) &&
config->color_two_side) {
int i;
ctx.face_idx = -1;
src/gallium/auxiliary/tgsi/tgsi_scan.c
+3 -3
View File
@@ -110,7 +110,7 @@ scan_src_operand(struct tgsi_shader_info *info,
info->input_usage_mask[ind] |= usage_mask_after_swizzle;
}
if (info->processor == PIPE_SHADER_FRAGMENT) {
if (info->processor == MESA_SHADER_FRAGMENT) {
unsigned name, input;
if (src->Register.Indirect && src->Indirect.ArrayID)
@@ -509,7 +509,7 @@ scan_declaration(struct tgsi_shader_info *info,
info->writes_edgeflag = true;
break;
case TGSI_SEMANTIC_POSITION:
if (procType == PIPE_SHADER_FRAGMENT)
if (procType == MESA_SHADER_FRAGMENT)
info->writes_z = true;
else
info->writes_position = true;
@@ -610,7 +610,7 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
return;
}
procType = parse.FullHeader.Processor.Processor;
assert(procType == PIPE_SHADER_FRAGMENT ||
assert(procType == MESA_SHADER_FRAGMENT ||
procType == MESA_SHADER_VERTEX ||
procType == MESA_SHADER_GEOMETRY ||
procType == MESA_SHADER_TESS_CTRL ||
src/gallium/auxiliary/tgsi/tgsi_text.c
+1 -1
View File
@@ -333,7 +333,7 @@ static bool parse_header( struct translate_ctx *ctx )
enum pipe_shader_type processor;
if (str_match_nocase_whole( &ctx->cur, "FRAG" ))
processor = PIPE_SHADER_FRAGMENT;
processor = MESA_SHADER_FRAGMENT;
else if (str_match_nocase_whole( &ctx->cur, "VERT" ))
processor = MESA_SHADER_VERTEX;
else if (str_match_nocase_whole( &ctx->cur, "GEOM" ))
src/gallium/auxiliary/tgsi/tgsi_ureg.c
+3 -3
View File
@@ -1862,7 +1862,7 @@ static void emit_decls( struct ureg_program *ureg )
emit_decl_range( ureg, TGSI_FILE_INPUT, i, 1 );
}
}
} else if (ureg->processor == PIPE_SHADER_FRAGMENT) {
} else if (ureg->processor == MESA_SHADER_FRAGMENT) {
if (ureg->supports_any_inout_decl_range) {
for (i = 0; i < ureg->nr_inputs; i++) {
emit_decl_fs(ureg,
@@ -2117,7 +2117,7 @@ const struct tgsi_token *ureg_finalize( struct ureg_program *ureg )
case MESA_SHADER_TESS_EVAL:
ureg_property(ureg, TGSI_PROPERTY_NEXT_SHADER,
ureg->next_shader_processor == -1 ?
PIPE_SHADER_FRAGMENT :
MESA_SHADER_FRAGMENT :
ureg->next_shader_processor);
break;
default:
@@ -2190,7 +2190,7 @@ void *ureg_create_shader( struct ureg_program *ureg,
return pipe->create_tes_state(pipe, &state);
case MESA_SHADER_GEOMETRY:
return pipe->create_gs_state(pipe, &state);
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
return pipe->create_fs_state(pipe, &state);
default:
return NULL;
src/gallium/auxiliary/util/u_blitter.c
+18 -18
View File
@@ -723,11 +723,11 @@ static void util_blitter_restore_textures_internal(struct blitter_context *blitt
void *states[2] = {NULL};
assert(count <= ARRAY_SIZE(states));
if (ctx->base.saved_num_sampler_states)
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, 0,
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT, 0,
ctx->base.saved_num_sampler_states,
ctx->base.saved_sampler_states);
else if (count)
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, 0,
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT, 0,
count,
states);
@@ -735,11 +735,11 @@ static void util_blitter_restore_textures_internal(struct blitter_context *blitt
/* Fragment sampler views. */
if (ctx->base.saved_num_sampler_views)
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0,
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0,
ctx->base.saved_num_sampler_views, 0,
ctx->base.saved_sampler_views);
else if (count)
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0,
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0,
0, count,
NULL);
@@ -759,7 +759,7 @@ void util_blitter_restore_constant_buffer_state(struct blitter_context *blitter)
{
struct pipe_context *pipe = blitter->pipe;
pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, blitter->cb_slot,
pipe->set_constant_buffer(pipe, MESA_SHADER_FRAGMENT, blitter->cb_slot,
true, &blitter->saved_fs_constant_buffer);
blitter->saved_fs_constant_buffer.buffer = NULL;
}
@@ -1523,7 +1523,7 @@ static void util_blitter_clear_custom(struct blitter_context *blitter,
.user_buffer = color->f,
.buffer_size = 4 * sizeof(float),
};
pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, blitter->cb_slot,
pipe->set_constant_buffer(pipe, MESA_SHADER_FRAGMENT, blitter->cb_slot,
false, &cb);
bind_fs_clear_color(ctx, true);
} else {
@@ -2143,8 +2143,8 @@ void util_blitter_blit_generic(struct blitter_context *blitter,
views[1] = pipe->create_sampler_view(pipe, src->texture, &templ);
count = 2;
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 2, 0, views);
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, 0, 2, samplers);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 2, 0, views);
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT, 0, 2, samplers);
pipe_sampler_view_reference(&views[1], NULL);
} else if (src_has_stencil && dst_has_stencil) {
@@ -2159,15 +2159,15 @@ void util_blitter_blit_generic(struct blitter_context *blitter,
view = pipe->create_sampler_view(pipe, src->texture, &templ);
count = 1;
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0, &view);
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT,
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0, &view);
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT,
0, 1, &sampler_state);
pipe_sampler_view_reference(&view, NULL);
} else {
count = 1;
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0, &src);
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT,
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0, &src);
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT,
0, 1, &sampler_state);
}
@@ -2287,7 +2287,7 @@ void util_blitter_generate_mipmap(struct blitter_context *blitter,
} else {
sampler_state = ctx->sampler_state_linear;
}
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT,
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT,
0, 1, &sampler_state);
blitter_set_common_draw_rect_state(ctx, false, false);
@@ -2320,7 +2320,7 @@ void util_blitter_generate_mipmap(struct blitter_context *blitter,
src_templ.format = format;
src_view = pipe->create_sampler_view(pipe, tex, &src_templ);
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0, &src_view);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0, &src_view);
do_blits(ctx, &dst_templ, &dstbox, src_view, tex->width0, tex->height0,
&srcbox, is_depth, false, false, 0);
@@ -2383,7 +2383,7 @@ void util_blitter_clear_render_target(struct blitter_context *blitter,
.user_buffer = color->f,
.buffer_size = 4 * sizeof(float),
};
pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, blitter->cb_slot,
pipe->set_constant_buffer(pipe, MESA_SHADER_FRAGMENT, blitter->cb_slot,
false, &cb);
num_layers = dstsurf->last_layer - dstsurf->first_layer + 1;
@@ -2808,8 +2808,8 @@ util_blitter_stencil_fallback(struct blitter_context *blitter,
pipe->set_scissor_states(pipe, 0, 1, scissor);
}
pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0, &src_view);
pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, 0, 1, &ctx->sampler_state);
pipe->set_sampler_views(pipe, MESA_SHADER_FRAGMENT, 0, 1, 0, &src_view);
pipe->bind_sampler_states(pipe, MESA_SHADER_FRAGMENT, 0, 1, &ctx->sampler_state);
unsigned stencil_bits =
util_format_get_component_bits(dst->format,
@@ -2833,7 +2833,7 @@ util_blitter_stencil_fallback(struct blitter_context *blitter,
.user_buffer = &mask,
.buffer_size = sizeof(mask),
};
pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, blitter->cb_slot,
pipe->set_constant_buffer(pipe, MESA_SHADER_FRAGMENT, blitter->cb_slot,
false, &cb);
pipe->bind_depth_stencil_alpha_state(pipe,
src/gallium/auxiliary/util/u_screen.c
+1 -1
View File
@@ -163,7 +163,7 @@ u_init_pipe_screen_caps(struct pipe_screen *pscreen, int accel)
caps->allow_dynamic_vao_fastpath = true;
caps->max_constant_buffer_size =
pscreen->shader_caps[PIPE_SHADER_FRAGMENT].max_const_buffer0_size;
pscreen->shader_caps[MESA_SHADER_FRAGMENT].max_const_buffer0_size;
/* accel=0: on CPU, always disabled
* accel>0: on GPU, enable by default, user can disable it manually
src/gallium/auxiliary/util/u_simple_shaders.c
+7 -7
View File
@@ -261,7 +261,7 @@ util_make_fragment_tex_shader(struct pipe_context *pipe,
assert((stype == TGSI_RETURN_TYPE_FLOAT) == (dtype == TGSI_RETURN_TYPE_FLOAT));
ureg = ureg_create( PIPE_SHADER_FRAGMENT );
ureg = ureg_create( MESA_SHADER_FRAGMENT );
if (!ureg)
return NULL;
@@ -320,7 +320,7 @@ util_make_fs_blit_zs(struct pipe_context *pipe, unsigned zs_mask,
struct ureg_src depth_sampler, stencil_sampler, coord;
struct ureg_dst depth, stencil, tmp;
ureg = ureg_create(PIPE_SHADER_FRAGMENT);
ureg = ureg_create(MESA_SHADER_FRAGMENT);
if (!ureg)
return NULL;
@@ -410,7 +410,7 @@ util_make_fragment_passthrough_shader(struct pipe_context *pipe,
void *
util_make_empty_fragment_shader(struct pipe_context *pipe)
{
struct ureg_program *ureg = ureg_create(PIPE_SHADER_FRAGMENT);
struct ureg_program *ureg = ureg_create(MESA_SHADER_FRAGMENT);
if (!ureg)
return NULL;
@@ -434,7 +434,7 @@ util_make_fragment_cloneinput_shader(struct pipe_context *pipe, int num_cbufs,
assert(num_cbufs <= PIPE_MAX_COLOR_BUFS);
ureg = ureg_create( PIPE_SHADER_FRAGMENT );
ureg = ureg_create( MESA_SHADER_FRAGMENT );
if (!ureg)
return NULL;
@@ -734,7 +734,7 @@ util_make_fs_msaa_resolve(struct pipe_context *pipe,
struct ureg_dst out, tmp_sum, tmp_coord, tmp;
unsigned i;
ureg = ureg_create(PIPE_SHADER_FRAGMENT);
ureg = ureg_create(MESA_SHADER_FRAGMENT);
if (!ureg)
return NULL;
@@ -802,7 +802,7 @@ util_make_fs_msaa_resolve_bilinear(struct pipe_context *pipe,
struct ureg_dst tmp_coord[4], tmp_sum[4], weights;
unsigned i, c;
ureg = ureg_create(PIPE_SHADER_FRAGMENT);
ureg = ureg_create(MESA_SHADER_FRAGMENT);
if (!ureg)
return NULL;
@@ -998,7 +998,7 @@ util_make_fs_pack_color_zs(struct pipe_context *pipe,
bool z24_is_high = zs_format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
zs_format == PIPE_FORMAT_X8Z24_UNORM;
ureg = ureg_create(PIPE_SHADER_FRAGMENT);
ureg = ureg_create(MESA_SHADER_FRAGMENT);
if (!ureg)
return NULL;
src/gallium/auxiliary/util/u_tests.c
+3 -3
View File
@@ -394,7 +394,7 @@ null_sampler_view(struct pipe_context *ctx, unsigned tgsi_tex_target)
PIPE_FORMAT_R8G8B8A8_UNORM, 0);
util_set_common_states_and_clear(cso, ctx, cb);
ctx->set_sampler_views(ctx, PIPE_SHADER_FRAGMENT, 0, 0, 1, NULL);
ctx->set_sampler_views(ctx, MESA_SHADER_FRAGMENT, 0, 0, 1, NULL);
/* Fragment shader. */
fs = util_make_fragment_tex_shader(ctx, tgsi_tex_target,
@@ -436,7 +436,7 @@ util_test_constant_buffer(struct pipe_context *ctx,
PIPE_FORMAT_R8G8B8A8_UNORM, 0);
util_set_common_states_and_clear(cso, ctx, cb);
pipe_set_constant_buffer(ctx, PIPE_SHADER_FRAGMENT, 0, constbuf);
pipe_set_constant_buffer(ctx, MESA_SHADER_FRAGMENT, 0, constbuf);
/* Fragment shader. */
{
@@ -707,7 +707,7 @@ test_texture_barrier(struct pipe_context *ctx, bool use_fbfetch,
templ.swizzle_b = PIPE_SWIZZLE_Z;
templ.swizzle_a = PIPE_SWIZZLE_W;
view = ctx->create_sampler_view(ctx, cb, &templ);
ctx->set_sampler_views(ctx, PIPE_SHADER_FRAGMENT, 0, 1, 0, &view);
ctx->set_sampler_views(ctx, MESA_SHADER_FRAGMENT, 0, 1, 0, &view);
/* Fragment shader. */
if (num_samples > 1) {
src/gallium/auxiliary/util/u_threaded_context.c
+7 -7
View File
@@ -911,7 +911,7 @@ tc_add_all_gfx_bindings_to_buffer_list(struct threaded_context *tc)
tc_add_bindings_to_buffer_list(buffer_list, tc->streamout_buffers, PIPE_MAX_SO_BUFFERS);
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_VERTEX);
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_FRAGMENT);
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_FRAGMENT);
if (tc->seen_tcs)
tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_TESS_CTRL);
@@ -955,7 +955,7 @@ tc_rebind_buffer(struct threaded_context *tc, uint32_t old_id, uint32_t new_id,
unsigned rebound = vbo + so;
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_VERTEX, rebind_mask);
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_FRAGMENT, rebind_mask);
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_FRAGMENT, rebind_mask);
if (tc->seen_tcs)
rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_TESS_CTRL, rebind_mask);
@@ -1007,7 +1007,7 @@ tc_is_buffer_bound_for_write(struct threaded_context *tc, uint32_t id)
return true;
if (tc_is_buffer_shader_bound_for_write(tc, id, MESA_SHADER_VERTEX) ||
tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_FRAGMENT) ||
tc_is_buffer_shader_bound_for_write(tc, id, MESA_SHADER_FRAGMENT) ||
tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_COMPUTE))
return true;
@@ -5508,13 +5508,13 @@ threaded_context_create(struct pipe_context *pipe,
/* If you have different limits in each shader stage, set the maximum. */
struct pipe_screen *screen = pipe->screen;;
tc->max_const_buffers =
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_const_buffers;
screen->shader_caps[MESA_SHADER_FRAGMENT].max_const_buffers;
tc->max_shader_buffers =
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_shader_buffers;
screen->shader_caps[MESA_SHADER_FRAGMENT].max_shader_buffers;
tc->max_images =
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_shader_images;
screen->shader_caps[MESA_SHADER_FRAGMENT].max_shader_images;
tc->max_samplers =
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_texture_samplers;
screen->shader_caps[MESA_SHADER_FRAGMENT].max_texture_samplers;
tc->base.set_context_param = tc_set_context_param; /* always set this */
src/gallium/auxiliary/vl/vl_bicubic_filter.c
+5 -5
View File
@@ -161,12 +161,12 @@ create_frag_shader(struct vl_bicubic_filter *filter, unsigned video_width,
struct ureg_dst t;
unsigned i;
if (screen->shader_caps[PIPE_SHADER_FRAGMENT].max_temps < 23) {
if (screen->shader_caps[MESA_SHADER_FRAGMENT].max_temps < 23) {
return NULL;
}
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader) {
return NULL;
}
@@ -449,13 +449,13 @@ vl_bicubic_filter_render(struct vl_bicubic_filter *filter,
filter->pipe->clear_render_target(filter->pipe, dst, &clear_color,
0, 0, pipe_surface_width(dst),
pipe_surface_height(dst), false);
filter->pipe->set_constant_buffer(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->set_constant_buffer(filter->pipe, MESA_SHADER_FRAGMENT,
0, false, &cb);
filter->pipe->bind_rasterizer_state(filter->pipe, filter->rs_state);
filter->pipe->bind_blend_state(filter->pipe, filter->blend);
filter->pipe->bind_sampler_states(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->bind_sampler_states(filter->pipe, MESA_SHADER_FRAGMENT,
0, 1, &filter->sampler);
filter->pipe->set_sampler_views(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->set_sampler_views(filter->pipe, MESA_SHADER_FRAGMENT,
0, 1, 0, &src);
filter->pipe->bind_vs_state(filter->pipe, filter->vs);
filter->pipe->bind_fs_state(filter->pipe, filter->fs);
src/gallium/auxiliary/vl/vl_compositor_gfx.c
+9 -9
View File
@@ -268,7 +268,7 @@ create_frag_shader_video_buffer(struct vl_compositor *c)
struct ureg_dst texel;
struct ureg_dst fragment;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -290,7 +290,7 @@ create_frag_shader_weave_rgb(struct vl_compositor *c)
struct ureg_program *shader;
struct ureg_dst texel, fragment;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -313,7 +313,7 @@ create_frag_shader_deint_yuv(struct vl_compositor *c, bool y, bool w)
struct ureg_program *shader;
struct ureg_dst texel, fragment;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -351,7 +351,7 @@ create_frag_shader_palette(struct vl_compositor *c, bool include_cc)
struct ureg_dst fragment;
unsigned i;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -405,7 +405,7 @@ create_frag_shader_rgba(struct vl_compositor *c)
struct ureg_src tc, color, sampler;
struct ureg_dst texel, fragment;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -440,7 +440,7 @@ create_frag_shader_rgb_yuv(struct vl_compositor *c, bool y)
struct ureg_src csc[3];
unsigned i;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -683,9 +683,9 @@ draw_layers(struct vl_compositor *c, struct vl_compositor_state *s, struct u_rec
c->pipe->bind_blend_state(c->pipe, blend);
c->pipe->set_viewport_states(c->pipe, 0, 1, &layer->viewport);
c->pipe->bind_fs_state(c->pipe, layer->fs);
c->pipe->bind_sampler_states(c->pipe, PIPE_SHADER_FRAGMENT, 0,
c->pipe->bind_sampler_states(c->pipe, MESA_SHADER_FRAGMENT, 0,
num_sampler_views, layer->samplers);
c->pipe->set_sampler_views(c->pipe, PIPE_SHADER_FRAGMENT, 0,
c->pipe->set_sampler_views(c->pipe, MESA_SHADER_FRAGMENT, 0,
num_sampler_views, 0, samplers);
util_draw_arrays(c->pipe, MESA_PRIM_QUADS, vb_index * 4, 4);
@@ -740,7 +740,7 @@ vl_compositor_gfx_render(struct vl_compositor_state *s,
c->pipe->bind_vs_state(c->pipe, c->vs);
c->pipe->bind_vertex_elements_state(c->pipe, c->vertex_elems_state);
util_set_vertex_buffers(c->pipe, 1, false, &c->vertex_buf);
pipe_set_constant_buffer(c->pipe, PIPE_SHADER_FRAGMENT, 0, s->shader_params);
pipe_set_constant_buffer(c->pipe, MESA_SHADER_FRAGMENT, 0, s->shader_params);
c->pipe->bind_rasterizer_state(c->pipe, c->rast);
draw_layers(c, s, dirty_area);
src/gallium/auxiliary/vl/vl_deint_filter.c
+4 -4
View File
@@ -94,7 +94,7 @@ create_copy_frag_shader(struct vl_deint_filter *filter, unsigned field,
struct ureg_dst o_fragment;
struct ureg_dst t_tex;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader) {
return NULL;
}
@@ -144,7 +144,7 @@ create_deint_frag_shader(struct vl_deint_filter *filter, unsigned field,
struct ureg_dst t_a, t_b;
struct ureg_dst t_weave, t_linear;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader) {
return NULL;
}
@@ -496,7 +496,7 @@ vl_deint_filter_render(struct vl_deint_filter *filter,
filter->pipe->bind_vertex_elements_state(filter->pipe, filter->ves);
util_set_vertex_buffers(filter->pipe, 1, false, &filter->quad);
filter->pipe->bind_vs_state(filter->pipe, filter->vs);
filter->pipe->bind_sampler_states(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->bind_sampler_states(filter->pipe, MESA_SHADER_FRAGMENT,
0, 4, filter->sampler);
/* prepare viewport */
@@ -531,7 +531,7 @@ vl_deint_filter_render(struct vl_deint_filter *filter,
sampler_views[1] = prev_sv[k];
sampler_views[2] = cur_sv[k];
sampler_views[3] = next_sv[k];
filter->pipe->set_sampler_views(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->set_sampler_views(filter->pipe, MESA_SHADER_FRAGMENT,
0, 4, 0, sampler_views);
/* blit current field */
src/gallium/auxiliary/vl/vl_idct.c
+6 -6
View File
@@ -200,7 +200,7 @@ create_mismatch_frag_shader(struct vl_idct *idct)
unsigned i;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -327,7 +327,7 @@ create_stage1_frag_shader(struct vl_idct *idct)
unsigned i;
int j;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -820,10 +820,10 @@ vl_idct_flush(struct vl_idct *idct, struct vl_idct_buffer *buffer, unsigned num_
idct->pipe->bind_rasterizer_state(idct->pipe, idct->rs_state);
idct->pipe->bind_blend_state(idct->pipe, idct->blend);
idct->pipe->bind_sampler_states(idct->pipe, PIPE_SHADER_FRAGMENT,
idct->pipe->bind_sampler_states(idct->pipe, MESA_SHADER_FRAGMENT,
0, 2, idct->samplers);
idct->pipe->set_sampler_views(idct->pipe, PIPE_SHADER_FRAGMENT, 0, 2, 0,
idct->pipe->set_sampler_views(idct->pipe, MESA_SHADER_FRAGMENT, 0, 2, 0,
buffer->sampler_views.stage[0]);
/* mismatch control */
@@ -848,8 +848,8 @@ vl_idct_prepare_stage2(struct vl_idct *idct, struct vl_idct_buffer *buffer)
/* second stage */
idct->pipe->bind_rasterizer_state(idct->pipe, idct->rs_state);
idct->pipe->bind_sampler_states(idct->pipe, PIPE_SHADER_FRAGMENT,
idct->pipe->bind_sampler_states(idct->pipe, MESA_SHADER_FRAGMENT,
0, 2, idct->samplers);
idct->pipe->set_sampler_views(idct->pipe, PIPE_SHADER_FRAGMENT,
idct->pipe->set_sampler_views(idct->pipe, MESA_SHADER_FRAGMENT,
0, 2, 0, buffer->sampler_views.stage[1]);
}
src/gallium/auxiliary/vl/vl_matrix_filter.c
+3 -3
View File
@@ -86,7 +86,7 @@ create_frag_shader(struct vl_matrix_filter *filter, unsigned num_offsets,
struct ureg_dst o_fragment;
unsigned i;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader) {
return NULL;
}
@@ -299,9 +299,9 @@ vl_matrix_filter_render(struct vl_matrix_filter *filter,
filter->pipe->bind_rasterizer_state(filter->pipe, filter->rs_state);
filter->pipe->bind_blend_state(filter->pipe, filter->blend);
filter->pipe->bind_sampler_states(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->bind_sampler_states(filter->pipe, MESA_SHADER_FRAGMENT,
0, 1, &filter->sampler);
filter->pipe->set_sampler_views(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->set_sampler_views(filter->pipe, MESA_SHADER_FRAGMENT,
0, 1, 0, &src);
filter->pipe->bind_vs_state(filter->pipe, filter->vs);
filter->pipe->bind_fs_state(filter->pipe, filter->fs);
src/gallium/auxiliary/vl/vl_mc.c
+4 -4
View File
@@ -169,7 +169,7 @@ create_ref_frag_shader(struct vl_mc *r)
struct ureg_dst fragment;
unsigned label;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -320,7 +320,7 @@ create_ycbcr_frag_shader(struct vl_mc *r, float scale, bool invert,
struct ureg_dst fragment;
unsigned label;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -620,9 +620,9 @@ vl_mc_render_ref(struct vl_mc *renderer, struct vl_mc_buffer *buffer, struct pip
renderer->pipe->bind_vs_state(renderer->pipe, renderer->vs_ref);
renderer->pipe->bind_fs_state(renderer->pipe, renderer->fs_ref);
renderer->pipe->set_sampler_views(renderer->pipe, PIPE_SHADER_FRAGMENT,
renderer->pipe->set_sampler_views(renderer->pipe, MESA_SHADER_FRAGMENT,
0, 1, 0, &ref);
renderer->pipe->bind_sampler_states(renderer->pipe, PIPE_SHADER_FRAGMENT,
renderer->pipe->bind_sampler_states(renderer->pipe, MESA_SHADER_FRAGMENT,
0, 1, &renderer->sampler_ref);
util_draw_arrays_instanced(renderer->pipe, MESA_PRIM_QUADS, 0, 4, 0,
src/gallium/auxiliary/vl/vl_median_filter.c
+4 -4
View File
@@ -92,13 +92,13 @@ create_frag_shader(struct vl_median_filter *filter,
return NULL;
}
if (num_offsets > screen->shader_caps[PIPE_SHADER_FRAGMENT].max_temps) {
if (num_offsets > screen->shader_caps[MESA_SHADER_FRAGMENT].max_temps) {
FREE(t_array);
return NULL;
}
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader) {
FREE(t_array);
return NULL;
@@ -417,9 +417,9 @@ vl_median_filter_render(struct vl_median_filter *filter,
filter->pipe->bind_rasterizer_state(filter->pipe, filter->rs_state);
filter->pipe->bind_blend_state(filter->pipe, filter->blend);
filter->pipe->bind_sampler_states(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->bind_sampler_states(filter->pipe, MESA_SHADER_FRAGMENT,
0, 1, &filter->sampler);
filter->pipe->set_sampler_views(filter->pipe, PIPE_SHADER_FRAGMENT,
filter->pipe->set_sampler_views(filter->pipe, MESA_SHADER_FRAGMENT,
0, 1, 0, &src);
filter->pipe->bind_vs_state(filter->pipe, filter->vs);
filter->pipe->bind_fs_state(filter->pipe, filter->fs);
src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
+3 -3
View File
@@ -822,10 +822,10 @@ vl_mpeg12_end_frame(struct pipe_video_codec *decoder,
vl_idct_prepare_stage2(i ? &dec->idct_c : &dec->idct_y, &buf->idct[plane]);
else {
dec->context->set_sampler_views(dec->context,
PIPE_SHADER_FRAGMENT, 0, 1, 0,
MESA_SHADER_FRAGMENT, 0, 1, 0,
&mc_source_sv[plane]);
dec->context->bind_sampler_states(dec->context,
PIPE_SHADER_FRAGMENT,
MESA_SHADER_FRAGMENT,
0, 1, &dec->sampler_ycbcr);
}
vl_mc_render_ycbcr(i ? &dec->mc_c : &dec->mc_y, &buf->mc[i], j, buf->num_ycbcr_blocks[plane]);
@@ -959,7 +959,7 @@ init_idct(struct vl_mpeg12_decoder *dec, const struct format_config* format_conf
nr_of_idct_render_targets = dec->context->screen->caps.max_render_targets;
max_inst = dec->context->screen->shader_caps[PIPE_SHADER_FRAGMENT].max_instructions;
max_inst = dec->context->screen->shader_caps[MESA_SHADER_FRAGMENT].max_instructions;
// Just assume we need 32 inst per render target, not 100% true, but should work in most cases
if (nr_of_idct_render_targets >= 4 && max_inst >= 32*4)
src/gallium/auxiliary/vl/vl_zscan.c
+3 -3
View File
@@ -137,7 +137,7 @@ create_frag_shader(struct vl_zscan *zscan)
unsigned i;
shader = ureg_create(PIPE_SHADER_FRAGMENT);
shader = ureg_create(MESA_SHADER_FRAGMENT);
if (!shader)
return NULL;
@@ -531,11 +531,11 @@ vl_zscan_render(struct vl_zscan *zscan, struct vl_zscan_buffer *buffer, unsigned
zscan->pipe->bind_rasterizer_state(zscan->pipe, zscan->rs_state);
zscan->pipe->bind_blend_state(zscan->pipe, zscan->blend);
zscan->pipe->bind_sampler_states(zscan->pipe, PIPE_SHADER_FRAGMENT,
zscan->pipe->bind_sampler_states(zscan->pipe, MESA_SHADER_FRAGMENT,
0, 3, zscan->samplers);
zscan->pipe->set_framebuffer_state(zscan->pipe, &buffer->fb_state);
zscan->pipe->set_viewport_states(zscan->pipe, 0, 1, &buffer->viewport);
zscan->pipe->set_sampler_views(zscan->pipe, PIPE_SHADER_FRAGMENT,
zscan->pipe->set_sampler_views(zscan->pipe, MESA_SHADER_FRAGMENT,
0, 3, 0, &buffer->src);
zscan->pipe->bind_vs_state(zscan->pipe, zscan->vs);
zscan->pipe->bind_fs_state(zscan->pipe, zscan->fs);
src/gallium/drivers/asahi/agx_blit.c
+6 -6
View File
@@ -482,11 +482,11 @@ agx_blitter_save(struct agx_context *ctx, struct blitter_context *blitter,
util_blitter_save_scissor(blitter, &ctx->scissor[0]);
util_blitter_save_fragment_shader(
blitter, ctx->stage[PIPE_SHADER_FRAGMENT].shader);
blitter, ctx->stage[MESA_SHADER_FRAGMENT].shader);
if (op & ASAHI_SAVE_FRAGMENT_CONSTANT) {
util_blitter_save_fragment_constant_buffer_slot(
blitter, ctx->stage[PIPE_SHADER_FRAGMENT].cb);
blitter, ctx->stage[MESA_SHADER_FRAGMENT].cb);
}
}
@@ -496,12 +496,12 @@ agx_blitter_save(struct agx_context *ctx, struct blitter_context *blitter,
if (op & ASAHI_SAVE_TEXTURES) {
util_blitter_save_fragment_sampler_states(
blitter, ctx->stage[PIPE_SHADER_FRAGMENT].sampler_count,
(void **)(ctx->stage[PIPE_SHADER_FRAGMENT].samplers));
blitter, ctx->stage[MESA_SHADER_FRAGMENT].sampler_count,
(void **)(ctx->stage[MESA_SHADER_FRAGMENT].samplers));
util_blitter_save_fragment_sampler_views(
blitter, ctx->stage[PIPE_SHADER_FRAGMENT].texture_count,
(struct pipe_sampler_view **)ctx->stage[PIPE_SHADER_FRAGMENT].textures);
blitter, ctx->stage[MESA_SHADER_FRAGMENT].texture_count,
(struct pipe_sampler_view **)ctx->stage[MESA_SHADER_FRAGMENT].textures);
}
if (!(op & ASAHI_DISABLE_RENDER_COND)) {
src/gallium/drivers/asahi/agx_disk_cache.c
+2 -2
View File
@@ -37,7 +37,7 @@ agx_disk_cache_compute_key(struct disk_cache *cache,
if (uncompiled->type == MESA_SHADER_VERTEX ||
uncompiled->type == MESA_SHADER_TESS_EVAL)
key_size = sizeof(shader_key->vs);
else if (uncompiled->type == PIPE_SHADER_FRAGMENT)
else if (uncompiled->type == MESA_SHADER_FRAGMENT)
key_size = sizeof(shader_key->fs);
else
key_size = 0;
@@ -95,7 +95,7 @@ read_shader(struct agx_screen *screen, struct blob_reader *blob,
if (uncompiled->type == MESA_SHADER_VERTEX ||
uncompiled->type == MESA_SHADER_TESS_EVAL ||
uncompiled->type == PIPE_SHADER_FRAGMENT) {
uncompiled->type == MESA_SHADER_FRAGMENT) {
binary->b.binary = malloc(size);
blob_copy_bytes(blob, binary->b.binary, size);
src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
+1 -1
View File
@@ -422,7 +422,7 @@ lay_out_uniforms(struct agx_compiled_shader *shader, struct state *state)
}
uniform = AGX_ABI_VUNI_COUNT_GL(count, sw);
} else if (state->stage == PIPE_SHADER_FRAGMENT) {
} else if (state->stage == MESA_SHADER_FRAGMENT) {
struct agx_draw_uniforms *u = NULL;
struct agx_stage_uniforms *s = NULL;
shader->push[shader->push_range_count++] = (struct agx_push_range){
src/gallium/drivers/asahi/agx_pipe.c
+1 -1
View File
@@ -1879,7 +1879,7 @@ agx_init_shader_caps(struct pipe_screen *pscreen)
* correctly, though. The full 32 is undesirable since it would require
* shenanigans to handle.
*/
caps->max_outputs = i == PIPE_SHADER_FRAGMENT ? 8
caps->max_outputs = i == MESA_SHADER_FRAGMENT ? 8
: i == MESA_SHADER_VERTEX ? 24
: 32;
src/gallium/drivers/asahi/agx_state.c
+24 -24
View File
@@ -1634,10 +1634,10 @@ agx_compile_variant(struct agx_device *dev, struct pipe_context *pctx,
NIR_PASS(_, nir, agx_nir_lower_multisampled_image_store);
struct agx_compiled_shader *compiled = agx_compile_nir(
dev, nir, &pctx->debug, so->type, false, so->type != PIPE_SHADER_FRAGMENT,
dev, nir, &pctx->debug, so->type, false, so->type != MESA_SHADER_FRAGMENT,
false, 0, attrib_components_read);
if (so->type == PIPE_SHADER_FRAGMENT) {
if (so->type == MESA_SHADER_FRAGMENT) {
/* XXX: don't replicate this all over the driver */
epilog_key.rt_spill_base = BITSET_LAST_BIT(nir->info.textures_used) +
(2 * BITSET_LAST_BIT(nir->info.images_used));
@@ -1714,7 +1714,7 @@ agx_get_shader_variant(struct agx_screen *screen, struct pipe_context *pctx,
union asahi_shader_key *cloned_key =
rzalloc(so->variants, union asahi_shader_key);
if (so->type == PIPE_SHADER_FRAGMENT) {
if (so->type == MESA_SHADER_FRAGMENT) {
memcpy(cloned_key, key, sizeof(struct asahi_fs_shader_key));
} else if (so->type == MESA_SHADER_VERTEX ||
so->type == MESA_SHADER_TESS_EVAL) {
@@ -1949,7 +1949,7 @@ agx_create_shader_state(struct pipe_context *pctx,
*/
if ((so->type == MESA_SHADER_TESS_CTRL) ||
(so->type == MESA_SHADER_GEOMETRY) ||
(so->type == PIPE_SHADER_FRAGMENT && !so->info.uses_fbfetch)) {
(so->type == MESA_SHADER_FRAGMENT && !so->info.uses_fbfetch)) {
union asahi_shader_key key = {0};
agx_get_shader_variant(agx_screen(pctx->screen), pctx, so, &key);
} else if (so->type == MESA_SHADER_VERTEX) {
@@ -1970,7 +1970,7 @@ agx_create_shader_state(struct pipe_context *pctx,
/* TODO: Tessellation shaders with shader-db */
return so;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
key.fs.nr_samples = 1;
/* For fbfetch */
@@ -2142,7 +2142,7 @@ asahi_fast_link(struct agx_context *ctx, struct agx_uncompiled_shader *so,
struct agx_linked_shader *linked =
rzalloc(so->linked_shaders, struct agx_linked_shader);
agx_fast_link(linked, dev, so->type == PIPE_SHADER_FRAGMENT, &key->main->b,
agx_fast_link(linked, dev, so->type == MESA_SHADER_FRAGMENT, &key->main->b,
&prolog->b, &epilog->b, key->nr_samples_shaded);
/* Cache the fast linked program */
@@ -2296,7 +2296,7 @@ agx_update_fs(struct agx_batch *batch)
/* Get main shader */
struct asahi_fs_shader_key key = {0};
if (ctx->stage[PIPE_SHADER_FRAGMENT].shader->info.uses_fbfetch) {
if (ctx->stage[MESA_SHADER_FRAGMENT].shader->info.uses_fbfetch) {
key.nr_samples = nr_samples;
for (unsigned i = 0; i < batch->key.nr_cbufs; ++i) {
@@ -2304,7 +2304,7 @@ agx_update_fs(struct agx_batch *batch)
}
}
agx_update_shader(ctx, &ctx->fs, PIPE_SHADER_FRAGMENT,
agx_update_shader(ctx, &ctx->fs, MESA_SHADER_FRAGMENT,
(union asahi_shader_key *)&key);
/* Fast link with prolog/epilog */
@@ -2380,7 +2380,7 @@ agx_update_fs(struct agx_batch *batch)
void *old = ctx->linked.fs;
ctx->linked.fs =
asahi_fast_link(ctx, ctx->stage[PIPE_SHADER_FRAGMENT].shader, &link_key);
asahi_fast_link(ctx, ctx->stage[MESA_SHADER_FRAGMENT].shader, &link_key);
if (ctx->fs->bo)
agx_batch_add_bo(batch, ctx->fs->bo);
@@ -2398,7 +2398,7 @@ agx_bind_shader_state(struct pipe_context *pctx, void *cso,
if (stage == MESA_SHADER_VERTEX)
ctx->dirty |= AGX_DIRTY_VS_PROG;
else if (stage == PIPE_SHADER_FRAGMENT)
else if (stage == MESA_SHADER_FRAGMENT)
ctx->dirty |= AGX_DIRTY_FS_PROG;
else
ctx->stage[stage].dirty = ~0;
@@ -2415,7 +2415,7 @@ agx_bind_vs_state(struct pipe_context *pctx, void *cso)
static void
agx_bind_fs_state(struct pipe_context *pctx, void *cso)
{
agx_bind_shader_state(pctx, cso, PIPE_SHADER_FRAGMENT);
agx_bind_shader_state(pctx, cso, MESA_SHADER_FRAGMENT);
}
static void
@@ -2664,7 +2664,7 @@ agx_nr_tex_descriptors(struct agx_batch *batch, struct agx_compiled_shader *cs)
unsigned n = agx_nr_tex_descriptors_without_spilled_rts(cs);
/* We add on texture/PBE descriptors for spilled render targets */
bool spilled_rt = cs->stage == PIPE_SHADER_FRAGMENT &&
bool spilled_rt = cs->stage == MESA_SHADER_FRAGMENT &&
agx_tilebuffer_spills(&batch->tilebuffer_layout);
if (spilled_rt)
n += (batch->key.nr_cbufs * 2);
@@ -2777,7 +2777,7 @@ agx_upload_textures(struct agx_batch *batch, struct agx_compiled_shader *cs,
agx_batch_upload_pbe(batch, pbe, view, false, false, false, false);
}
if (stage == PIPE_SHADER_FRAGMENT &&
if (stage == MESA_SHADER_FRAGMENT &&
agx_tilebuffer_spills(&batch->tilebuffer_layout)) {
struct agx_texture_packed *out =
@@ -2955,7 +2955,7 @@ agx_build_pipeline(struct agx_batch *batch, struct agx_compiled_shader *cs,
unsigned preamble_size = (cs->b.info.preamble_scratch_size > 0) ? 1 : 0;
switch (phys_stage) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
agx_scratch_alloc(&ctx->scratch_fs, max_scratch_size, max_subgroups);
batch->fs_scratch = true;
batch->fs_preamble_scratch =
@@ -2976,7 +2976,7 @@ agx_build_pipeline(struct agx_batch *batch, struct agx_compiled_shader *cs,
}
}
if (stage == PIPE_SHADER_FRAGMENT) {
if (stage == MESA_SHADER_FRAGMENT) {
agx_usc_push_packed(&b, SHARED, &batch->tilebuffer_layout.usc);
} else {
agx_usc_shared_non_fragment(&b, &cs->b.info, variable_shared_mem);
@@ -2986,7 +2986,7 @@ agx_build_pipeline(struct agx_batch *batch, struct agx_compiled_shader *cs,
agx_usc_push_packed(&b, SHADER, linked->shader);
agx_usc_push_packed(&b, REGISTERS, linked->regs);
if (stage == PIPE_SHADER_FRAGMENT)
if (stage == MESA_SHADER_FRAGMENT)
agx_usc_push_packed(&b, FRAGMENT_PROPERTIES, linked->fragment_props);
} else {
agx_usc_pack(&b, SHADER, cfg) {
@@ -3671,7 +3671,7 @@ agx_encode_state(struct agx_batch *batch, uint8_t *out)
}
if (dirty.fragment_shader) {
unsigned frag_tex_count = ctx->stage[PIPE_SHADER_FRAGMENT].texture_count;
unsigned frag_tex_count = ctx->stage[MESA_SHADER_FRAGMENT].texture_count;
agx_ppp_push(&ppp, FRAGMENT_SHADER_WORD_0, cfg) {
cfg.uniform_register_count = ctx->fs->b.info.push_count;
@@ -3679,13 +3679,13 @@ agx_encode_state(struct agx_batch *batch, uint8_t *out)
cfg.texture_state_register_count =
agx_nr_tex_descriptors(batch, ctx->fs);
cfg.sampler_state_register_count =
translate_sampler_state_count(ctx, PIPE_SHADER_FRAGMENT);
translate_sampler_state_count(ctx, MESA_SHADER_FRAGMENT);
cfg.cf_binding_count = ctx->linked.fs->cf.nr_bindings;
}
agx_ppp_push(&ppp, FRAGMENT_SHADER_WORD_1, cfg) {
cfg.pipeline = agx_build_pipeline(batch, ctx->fs, ctx->linked.fs,
PIPE_SHADER_FRAGMENT, 0, 0);
MESA_SHADER_FRAGMENT, 0, 0);
}
agx_ppp_push(&ppp, FRAGMENT_SHADER_WORD_2, cfg) {
@@ -3930,7 +3930,7 @@ agx_batch_geometry_params(struct agx_batch *batch, uint64_t input_index_buffer,
struct agx_geometry_params params = {
.indirect_desc = batch->geom_indirect,
.flat_outputs =
batch->ctx->stage[PIPE_SHADER_FRAGMENT].shader->info.inputs_flat_shaded,
batch->ctx->stage[MESA_SHADER_FRAGMENT].shader->info.inputs_flat_shaded,
.input_topology = info->mode,
.xfb_offs_ptrs = {AGX_ZERO_PAGE_ADDRESS, AGX_ZERO_PAGE_ADDRESS,
AGX_ZERO_PAGE_ADDRESS, AGX_ZERO_PAGE_ADDRESS},
@@ -5043,8 +5043,8 @@ agx_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
agx_assign_uvs(
&batch->linked_varyings, &vs->uvs,
ctx->stage[PIPE_SHADER_FRAGMENT].shader->info.inputs_flat_shaded,
ctx->stage[PIPE_SHADER_FRAGMENT].shader->info.inputs_linear_shaded);
ctx->stage[MESA_SHADER_FRAGMENT].shader->info.inputs_flat_shaded,
ctx->stage[MESA_SHADER_FRAGMENT].shader->info.inputs_linear_shaded);
for (unsigned i = 0; i < VARYING_SLOT_MAX; ++i) {
batch->uniforms.uvs_index[i] = batch->linked_varyings.slots[i];
@@ -5060,8 +5060,8 @@ agx_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
if (agx_update_fs(batch)) {
ctx->dirty |= AGX_DIRTY_FS | AGX_DIRTY_FS_PROG;
ctx->stage[PIPE_SHADER_FRAGMENT].dirty = ~0;
} else if ((ctx->stage[PIPE_SHADER_FRAGMENT].dirty) ||
ctx->stage[MESA_SHADER_FRAGMENT].dirty = ~0;
} else if ((ctx->stage[MESA_SHADER_FRAGMENT].dirty) ||
(ctx->dirty & (AGX_DIRTY_BLEND_COLOR | AGX_DIRTY_SAMPLE_MASK))) {
ctx->dirty |= AGX_DIRTY_FS;
}
src/gallium/drivers/asahi/agx_state.h
+1 -1
View File
@@ -96,7 +96,7 @@ static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_TESS_EVAL) == AGX_SYSVAL_TABLE_TES,
"fixed enum orderings");
static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_GEOMETRY) == AGX_SYSVAL_TABLE_GS,
"fixed enum orderings");
static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_FRAGMENT) == AGX_SYSVAL_TABLE_FS,
static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_FRAGMENT) == AGX_SYSVAL_TABLE_FS,
"fixed enum orderings");
static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_COMPUTE) == AGX_SYSVAL_TABLE_CS,
"fixed enum orderings");
src/gallium/drivers/crocus/crocus_screen.c
+3 -3
View File
@@ -145,12 +145,12 @@ crocus_init_shader_caps(struct crocus_screen *screen)
if (devinfo->ver < 6 &&
i != MESA_SHADER_VERTEX &&
i != PIPE_SHADER_FRAGMENT)
i != MESA_SHADER_FRAGMENT)
continue;
if (devinfo->ver == 6 &&
i != MESA_SHADER_VERTEX &&
i != PIPE_SHADER_FRAGMENT &&
i != MESA_SHADER_FRAGMENT &&
i != MESA_SHADER_GEOMETRY)
continue;
@@ -181,7 +181,7 @@ crocus_init_shader_caps(struct crocus_screen *screen)
(devinfo->verx10 >= 75) ? CROCUS_MAX_TEXTURE_SAMPLERS : 16;
if (devinfo->ver >= 7 &&
(i == PIPE_SHADER_FRAGMENT || i == PIPE_SHADER_COMPUTE))
(i == MESA_SHADER_FRAGMENT || i == PIPE_SHADER_COMPUTE))
caps->max_shader_images = CROCUS_MAX_TEXTURE_SAMPLERS;
caps->max_shader_buffers =
src/gallium/drivers/crocus/crocus_state.c
+1 -1
View File
@@ -2318,7 +2318,7 @@ crocus_bind_sampler_states(struct pipe_context *ctx,
if (dirty) {
#if GFX_VER <= 5
if (p_stage == PIPE_SHADER_FRAGMENT)
if (p_stage == MESA_SHADER_FRAGMENT)
ice->state.dirty |= CROCUS_DIRTY_WM;
else if (p_stage == MESA_SHADER_VERTEX)
ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_VS;
src/gallium/drivers/d3d12/d3d12_blit.cpp
+8 -8
View File
@@ -270,7 +270,7 @@ util_blit_save_state(struct d3d12_context *ctx)
util_blitter_save_vertex_elements(ctx->blitter, ctx->gfx_pipeline_state.ves);
util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
util_blitter_save_rasterizer(ctx->blitter, ctx->gfx_pipeline_state.rast);
util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_FRAGMENT]);
util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_GEOMETRY]);
util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_CTRL]);
@@ -280,12 +280,12 @@ util_blit_save_state(struct d3d12_context *ctx)
util_blitter_save_viewport(ctx->blitter, ctx->viewport_states);
util_blitter_save_scissor(ctx->blitter, ctx->scissor_states);
util_blitter_save_fragment_sampler_states(ctx->blitter,
ctx->num_samplers[PIPE_SHADER_FRAGMENT],
(void **)ctx->samplers[PIPE_SHADER_FRAGMENT]);
ctx->num_samplers[MESA_SHADER_FRAGMENT],
(void **)ctx->samplers[MESA_SHADER_FRAGMENT]);
util_blitter_save_fragment_sampler_views(ctx->blitter,
ctx->num_sampler_views[PIPE_SHADER_FRAGMENT],
ctx->sampler_views[PIPE_SHADER_FRAGMENT]);
util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, ctx->cbufs[PIPE_SHADER_FRAGMENT]);
ctx->num_sampler_views[MESA_SHADER_FRAGMENT],
ctx->sampler_views[MESA_SHADER_FRAGMENT]);
util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, ctx->cbufs[MESA_SHADER_FRAGMENT]);
util_blitter_save_vertex_buffers(ctx->blitter, ctx->vbs, ctx->num_vbs);
util_blitter_save_sample_mask(ctx->blitter, ctx->gfx_pipeline_state.sample_mask, 0);
util_blitter_save_so_targets(ctx->blitter, ctx->gfx_pipeline_state.num_so_targets, ctx->so_targets,
@@ -502,8 +502,8 @@ resolve_stencil_to_temp(struct d3d12_context *ctx,
void *sampler_state = get_sampler_state(ctx);
util_blit_save_state(ctx);
pctx->set_sampler_views(pctx, PIPE_SHADER_FRAGMENT, 0, 1, 0, &src_view);
pctx->bind_sampler_states(pctx, PIPE_SHADER_FRAGMENT, 0, 1, &sampler_state);
pctx->set_sampler_views(pctx, MESA_SHADER_FRAGMENT, 0, 1, 0, &src_view);
pctx->bind_sampler_states(pctx, MESA_SHADER_FRAGMENT, 0, 1, &sampler_state);
util_blitter_custom_shader(ctx->blitter, &dst_tmpl,
(uint16_t)pipe_surface_width(&dst_tmpl),
(uint16_t)pipe_surface_height(&dst_tmpl),
src/gallium/drivers/d3d12/d3d12_compiler.cpp
+23 -23
View File
@@ -120,14 +120,14 @@ compile_nir(struct d3d12_context *ctx, struct d3d12_shader_selector *sel,
const struct dxil_nir_lower_loads_stores_options loads_stores_options = {};
NIR_PASS(_, nir, dxil_nir_lower_loads_stores_to_dxil, &loads_stores_options);
if (key->stage == PIPE_SHADER_FRAGMENT && key->fs.multisample_disabled)
if (key->stage == MESA_SHADER_FRAGMENT && key->fs.multisample_disabled)
NIR_PASS(_, nir, d3d12_disable_multisampling);
struct nir_to_dxil_options opts = {};
opts.interpolate_at_vertex = screen->have_load_at_vertex;
opts.lower_int16 = !screen->opts4.Native16BitShaderOpsSupported;
opts.last_ubo_is_not_arrayed = shader->num_state_vars > 0;
if (key->stage == PIPE_SHADER_FRAGMENT)
if (key->stage == MESA_SHADER_FRAGMENT)
opts.provoking_vertex = key->fs.provoking_vertex;
opts.input_clip_size = key->input_clip_size;
opts.environment = DXIL_ENVIRONMENT_GL;
@@ -234,7 +234,7 @@ missing_dual_src_outputs(struct d3d12_context *ctx)
if (!ctx->gfx_pipeline_state.blend || !ctx->gfx_pipeline_state.blend->is_dual_src)
return 0;
struct d3d12_shader_selector *fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
struct d3d12_shader_selector *fs = ctx->gfx_stages[MESA_SHADER_FRAGMENT];
if (!fs)
return 0;
@@ -275,7 +275,7 @@ missing_dual_src_outputs(struct d3d12_context *ctx)
static unsigned
frag_result_color_lowering(struct d3d12_context *ctx)
{
struct d3d12_shader_selector *fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
struct d3d12_shader_selector *fs = ctx->gfx_stages[MESA_SHADER_FRAGMENT];
assert(fs);
if (fs->initial->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR))
@@ -310,7 +310,7 @@ manual_depth_range(struct d3d12_context *ctx)
* it.
*/
struct d3d12_shader_selector *fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
struct d3d12_shader_selector *fs = ctx->gfx_stages[MESA_SHADER_FRAGMENT];
return fs && fs->initial->info.inputs_read & VARYING_BIT_POS;
}
@@ -434,7 +434,7 @@ get_provoking_vertex(struct d3d12_selection_context *sel_ctx, bool *alternate, c
bool
has_flat_varyings(struct d3d12_context *ctx)
{
struct d3d12_shader_selector *fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
struct d3d12_shader_selector *fs = ctx->gfx_stages[MESA_SHADER_FRAGMENT];
if (!fs)
return false;
@@ -631,7 +631,7 @@ validate_geometry_shader_variant(struct d3d12_selection_context *sel_ctx)
return;
d3d12_shader_selector* vs = ctx->gfx_stages[MESA_SHADER_VERTEX];
d3d12_shader_selector* fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
d3d12_shader_selector* fs = ctx->gfx_stages[MESA_SHADER_FRAGMENT];
struct d3d12_gs_variant_key key;
key.all = 0;
@@ -730,7 +730,7 @@ d3d12_compare_shader_keys(struct d3d12_selection_context* sel_ctx, const d3d12_s
expect->ds.prev_patch_outputs != have->ds.prev_patch_outputs)
return false;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
if (expect->fs.all != have->fs.all)
return false;
break;
@@ -808,7 +808,7 @@ d3d12_shader_key_hash(const d3d12_shader_key *key)
case MESA_SHADER_GEOMETRY:
hash += static_cast<uint32_t>(key->gs.all);
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
hash += key->fs.all;
break;
case PIPE_SHADER_COMPUTE:
@@ -846,7 +846,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
case MESA_SHADER_VERTEX:
key->vs.needs_format_emulation = 0;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
key->fs.all = 0;
break;
case MESA_SHADER_GEOMETRY:
@@ -879,7 +879,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
/* Set the provoking vertex based on the previous shader output. Only set the
* key value if the driver actually supports changing the provoking vertex though */
if (stage == PIPE_SHADER_FRAGMENT && sel_ctx->ctx->gfx_pipeline_state.rast &&
if (stage == MESA_SHADER_FRAGMENT && sel_ctx->ctx->gfx_pipeline_state.rast &&
!sel_ctx->needs_vertex_reordering &&
d3d12_screen(sel_ctx->ctx->base.screen)->have_load_at_vertex)
key->fs.provoking_vertex = sel_ctx->provoking_vertex;
@@ -888,7 +888,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
* to the output, and in cases of TES or GS you could have differently-sized inputs
* and outputs. For FS, there is no output, so it's repurposed to mean input.
*/
if (stage != PIPE_SHADER_FRAGMENT)
if (stage != MESA_SHADER_FRAGMENT)
key->input_clip_size = prev->initial->info.clip_distance_array_size;
}
@@ -904,7 +904,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
if (stage == MESA_SHADER_GEOMETRY ||
((stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL) &&
(!next || next->stage == PIPE_SHADER_FRAGMENT))) {
(!next || next->stage == MESA_SHADER_FRAGMENT))) {
key->last_vertex_processing_stage = 1;
key->invert_depth = sel_ctx->ctx->reverse_depth_range;
key->halfz = sel_ctx->ctx->gfx_pipeline_state.rast ?
@@ -937,7 +937,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
if (next->initial->info.inputs_read & VARYING_BIT_PRIMITIVE_ID)
key->gs.primitive_id = 1;
}
} else if (stage == PIPE_SHADER_FRAGMENT) {
} else if (stage == MESA_SHADER_FRAGMENT) {
key->fs.missing_dual_src_outputs = sel_ctx->missing_dual_src_outputs;
key->fs.frag_result_color_lowering = sel_ctx->frag_result_color_lowering;
key->fs.manual_depth_range = sel_ctx->manual_depth_range;
@@ -1029,7 +1029,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
}
}
if (stage == PIPE_SHADER_FRAGMENT &&
if (stage == MESA_SHADER_FRAGMENT &&
sel_ctx->ctx->gfx_stages[MESA_SHADER_GEOMETRY] &&
sel_ctx->ctx->gfx_stages[MESA_SHADER_GEOMETRY]->is_variant &&
sel_ctx->ctx->gfx_stages[MESA_SHADER_GEOMETRY]->gs_key.has_front_face) {
@@ -1090,7 +1090,7 @@ select_shader_variant(struct d3d12_selection_context *sel_ctx, d3d12_shader_sele
if (key.gs.triangle_strip)
NIR_PASS(_, new_nir_variant, d3d12_lower_triangle_strip);
}
else if (key.stage == PIPE_SHADER_FRAGMENT)
else if (key.stage == MESA_SHADER_FRAGMENT)
{
if (key.fs.polygon_stipple) {
NIR_PASS(_, new_nir_variant, nir_lower_pstipple_fs,
@@ -1125,7 +1125,7 @@ select_shader_variant(struct d3d12_selection_context *sel_ctx, d3d12_shader_sele
false);
}
if (key.stage == PIPE_SHADER_FRAGMENT) {
if (key.stage == MESA_SHADER_FRAGMENT) {
if (key.fs.cast_to_uint)
NIR_PASS(_, new_nir_variant, d3d12_lower_uint_cast, false);
if (key.fs.cast_to_int)
@@ -1202,7 +1202,7 @@ get_prev_shader(struct d3d12_context *ctx, pipe_shader_type current)
switch (current) {
case MESA_SHADER_VERTEX:
return NULL;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
if (ctx->gfx_stages[MESA_SHADER_GEOMETRY])
return ctx->gfx_stages[MESA_SHADER_GEOMETRY];
FALLTHROUGH;
@@ -1238,8 +1238,8 @@ get_next_shader(struct d3d12_context *ctx, pipe_shader_type current)
return ctx->gfx_stages[MESA_SHADER_GEOMETRY];
FALLTHROUGH;
case MESA_SHADER_GEOMETRY:
return ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
case PIPE_SHADER_FRAGMENT:
return ctx->gfx_stages[MESA_SHADER_FRAGMENT];
case MESA_SHADER_FRAGMENT:
return NULL;
default:
UNREACHABLE("shader type not supported");
@@ -1528,9 +1528,9 @@ d3d12_select_shader_variants(struct d3d12_context *ctx, const struct pipe_draw_i
next = get_next_shader(ctx, MESA_SHADER_GEOMETRY);
select_shader_variant(&sel_ctx, stages[MESA_SHADER_GEOMETRY], prev, next);
}
if (stages[PIPE_SHADER_FRAGMENT]) {
prev = get_prev_shader(ctx, PIPE_SHADER_FRAGMENT);
select_shader_variant(&sel_ctx, stages[PIPE_SHADER_FRAGMENT], prev, nullptr);
if (stages[MESA_SHADER_FRAGMENT]) {
prev = get_prev_shader(ctx, MESA_SHADER_FRAGMENT);
select_shader_variant(&sel_ctx, stages[MESA_SHADER_FRAGMENT], prev, nullptr);
}
}
src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
+10 -10
View File
@@ -1097,7 +1097,7 @@ static void *
d3d12_create_fs_state(struct pipe_context *pctx,
const struct pipe_shader_state *shader)
{
return d3d12_create_shader(d3d12_context(pctx), PIPE_SHADER_FRAGMENT, shader);
return d3d12_create_shader(d3d12_context(pctx), MESA_SHADER_FRAGMENT, shader);
}
static void
@@ -1105,7 +1105,7 @@ d3d12_bind_fs_state(struct pipe_context *pctx,
void *fss)
{
struct d3d12_context* ctx = d3d12_context(pctx);
bind_stage(ctx, PIPE_SHADER_FRAGMENT,
bind_stage(ctx, MESA_SHADER_FRAGMENT,
(struct d3d12_shader_selector *) fss);
ctx->has_flat_varyings = has_flat_varyings(ctx);
ctx->missing_dual_src_outputs = missing_dual_src_outputs(ctx) != 0;
@@ -1116,7 +1116,7 @@ static void
d3d12_delete_fs_state(struct pipe_context *pctx,
void *fs)
{
delete_shader(d3d12_context(pctx), PIPE_SHADER_FRAGMENT,
delete_shader(d3d12_context(pctx), MESA_SHADER_FRAGMENT,
(struct d3d12_shader_selector *) fs);
}
@@ -1950,7 +1950,7 @@ d3d12_clear_render_target(struct pipe_context *pctx,
util_blitter_save_vertex_elements(ctx->blitter, ctx->gfx_pipeline_state.ves);
util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
util_blitter_save_rasterizer(ctx->blitter, ctx->gfx_pipeline_state.rast);
util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_FRAGMENT]);
util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_GEOMETRY]);
util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_CTRL]);
@@ -1960,12 +1960,12 @@ d3d12_clear_render_target(struct pipe_context *pctx,
util_blitter_save_viewport(ctx->blitter, ctx->viewport_states);
util_blitter_save_scissor(ctx->blitter, ctx->scissor_states);
util_blitter_save_fragment_sampler_states(ctx->blitter,
ctx->num_samplers[PIPE_SHADER_FRAGMENT],
(void **)ctx->samplers[PIPE_SHADER_FRAGMENT]);
ctx->num_samplers[MESA_SHADER_FRAGMENT],
(void **)ctx->samplers[MESA_SHADER_FRAGMENT]);
util_blitter_save_fragment_sampler_views(ctx->blitter,
ctx->num_sampler_views[PIPE_SHADER_FRAGMENT],
ctx->sampler_views[PIPE_SHADER_FRAGMENT]);
util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, ctx->cbufs[PIPE_SHADER_FRAGMENT]);
ctx->num_sampler_views[MESA_SHADER_FRAGMENT],
ctx->sampler_views[MESA_SHADER_FRAGMENT]);
util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, ctx->cbufs[MESA_SHADER_FRAGMENT]);
util_blitter_save_vertex_buffers(ctx->blitter, ctx->vbs, ctx->num_vbs);
util_blitter_save_sample_mask(ctx->blitter, ctx->gfx_pipeline_state.sample_mask, 0);
util_blitter_save_so_targets(ctx->blitter, ctx->gfx_pipeline_state.num_so_targets, ctx->so_targets,
@@ -2165,7 +2165,7 @@ d3d12_set_tess_state(struct pipe_context *pctx,
bool
d3d12_need_zero_one_depth_range(struct d3d12_context *ctx)
{
struct d3d12_shader_selector *fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
struct d3d12_shader_selector *fs = ctx->gfx_stages[MESA_SHADER_FRAGMENT];
/**
* OpenGL Compatibility spec, section 15.2.3 (Shader Outputs) says
src/gallium/drivers/d3d12/d3d12_draw.cpp
+2 -2
View File
@@ -115,7 +115,7 @@ fill_srv_descriptors(struct d3d12_context *ctx,
view->texture_generation_id = res->generation_id;
}
D3D12_RESOURCE_STATES state = (stage == PIPE_SHADER_FRAGMENT) ?
D3D12_RESOURCE_STATES state = (stage == MESA_SHADER_FRAGMENT) ?
D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE :
D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE;
if (view->base.texture->target == PIPE_BUFFER) {
@@ -955,7 +955,7 @@ d3d12_draw_vbo(struct pipe_context *pctx,
}
if (ctx->pstipple.enabled && ctx->gfx_pipeline_state.rast->base.poly_stipple_enable)
ctx->shader_dirty[PIPE_SHADER_FRAGMENT] |= D3D12_SHADER_DIRTY_SAMPLER_VIEWS |
ctx->shader_dirty[MESA_SHADER_FRAGMENT] |= D3D12_SHADER_DIRTY_SAMPLER_VIEWS |
D3D12_SHADER_DIRTY_SAMPLERS;
/* this should *really* be fixed at a higher level than here! */
src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
+2 -2
View File
@@ -308,9 +308,9 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
}
bool last_vertex_stage_writes_pos = (last_vertex_stage_nir->info.outputs_written & VARYING_BIT_POS) != 0;
if (last_vertex_stage_writes_pos && state->stages[PIPE_SHADER_FRAGMENT] &&
if (last_vertex_stage_writes_pos && state->stages[MESA_SHADER_FRAGMENT] &&
!state->rast->base.rasterizer_discard) {
auto shader = state->stages[PIPE_SHADER_FRAGMENT];
auto shader = state->stages[MESA_SHADER_FRAGMENT];
pso_desc.PS = D3D12_SHADER_BYTECODE{ shader->bytecode, shader->bytecode_length };
}
src/gallium/drivers/d3d12/d3d12_root_signature.cpp
+1 -1
View File
@@ -43,7 +43,7 @@ get_shader_visibility(enum pipe_shader_type stage)
switch (stage) {
case MESA_SHADER_VERTEX:
return D3D12_SHADER_VISIBILITY_VERTEX;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
return D3D12_SHADER_VISIBILITY_PIXEL;
case MESA_SHADER_GEOMETRY:
return D3D12_SHADER_VISIBILITY_GEOMETRY;
src/gallium/drivers/d3d12/d3d12_screen.cpp
+1 -1
View File
@@ -142,7 +142,7 @@ d3d12_init_shader_caps(struct d3d12_screen *screen)
caps->max_inputs = D3D12_VS_INPUT_REGISTER_COUNT;
caps->max_outputs = D3D12_VS_OUTPUT_REGISTER_COUNT;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
caps->max_inputs = D3D12_PS_INPUT_REGISTER_COUNT;
caps->max_outputs = D3D12_PS_OUTPUT_REGISTER_COUNT;
break;
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+1 -1
View File
@@ -50,7 +50,7 @@ void
etna_blit_save_state(struct etna_context *ctx, bool render_cond)
{
util_blitter_save_fragment_constant_buffer_slot(ctx->blitter,
ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb);
ctx->constant_buffer[MESA_SHADER_FRAGMENT].cb);
util_blitter_save_vertex_buffers(ctx->blitter, ctx->vertex_buffer.vb,
ctx->vertex_buffer.count);
util_blitter_save_vertex_elements(ctx->blitter, ctx->vertex_elements);
src/gallium/drivers/etnaviv/etnaviv_context.c
+2 -2
View File
@@ -346,8 +346,8 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
u_foreach_bit(i, ctx->constant_buffer[MESA_SHADER_VERTEX].enabled_mask)
resource_read(ctx, ctx->constant_buffer[MESA_SHADER_VERTEX].cb[i].buffer);
u_foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask)
resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb[i].buffer);
u_foreach_bit(i, ctx->constant_buffer[MESA_SHADER_FRAGMENT].enabled_mask)
resource_read(ctx, ctx->constant_buffer[MESA_SHADER_FRAGMENT].cb[i].buffer);
}
if (ctx->dirty & ETNA_DIRTY_VERTEX_BUFFERS) {
src/gallium/drivers/etnaviv/etnaviv_emit.c
+2 -2
View File
@@ -749,7 +749,7 @@ etna_emit_state(struct etna_context *ctx)
if (need_steering)
etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_UNIFORM);
etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb);
etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[MESA_SHADER_FRAGMENT].cb);
if (screen->info->halti >= 5) {
/* HALTI5 needs to be prompted to pre-fetch shaders */
@@ -770,7 +770,7 @@ etna_emit_state(struct etna_context *ctx)
etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_UNIFORM);
if (dirty & (uniform_dirty_bits | ctx->shader.fs->uniforms_dirty_bits))
etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb);
etna_uniforms_write(ctx, ctx->shader.fs, ctx->constant_buffer[MESA_SHADER_FRAGMENT].cb);
}
/**** End of state update ****/
#undef EMIT_STATE
src/gallium/drivers/etnaviv/etnaviv_screen.c
+4 -4
View File
@@ -171,7 +171,7 @@ etna_init_single_shader_caps(struct etna_screen *screen, enum pipe_shader_type s
* of vertex elements - each element defines one vertex shader
* input register. For the fragment shader, this is the number
* of varyings. */
caps->max_inputs = shader == PIPE_SHADER_FRAGMENT ?
caps->max_inputs = shader == MESA_SHADER_FRAGMENT ?
screen->specs.max_varyings : screen->specs.vertex_max_elements;
caps->max_outputs = screen->specs.max_vs_outputs;
caps->max_temps = 64; /* Max native temporaries. */
@@ -183,13 +183,13 @@ etna_init_single_shader_caps(struct etna_screen *screen, enum pipe_shader_type s
caps->integers = screen->info->halti >= 2;
caps->max_texture_samplers =
caps->max_sampler_views = shader == PIPE_SHADER_FRAGMENT
caps->max_sampler_views = shader == MESA_SHADER_FRAGMENT
? screen->specs.fragment_sampler_count
: screen->specs.vertex_sampler_count;
caps->max_const_buffer0_size =
ubo_enable ? 16384 /* 16384 so state tracker enables UBOs */ :
(shader == PIPE_SHADER_FRAGMENT
(shader == MESA_SHADER_FRAGMENT
? screen->specs.max_ps_uniforms * sizeof(float[4])
: screen->specs.max_vs_uniforms * sizeof(float[4]));
@@ -202,7 +202,7 @@ static void
etna_init_shader_caps(struct etna_screen *screen)
{
etna_init_single_shader_caps(screen, MESA_SHADER_VERTEX);
etna_init_single_shader_caps(screen, PIPE_SHADER_FRAGMENT);
etna_init_single_shader_caps(screen, MESA_SHADER_FRAGMENT);
}
static void
src/gallium/drivers/etnaviv/etnaviv_texture.c
+2 -2
View File
@@ -50,7 +50,7 @@ etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader
int offset;
switch (shader) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
offset = 0;
ctx->num_fragment_samplers = num_samplers;
break;
@@ -331,7 +331,7 @@ etna_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
switch (shader) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
etna_fragtex_set_sampler_views(ctx, num_views, views);
break;
case MESA_SHADER_VERTEX:
src/gallium/drivers/freedreno/a2xx/fd2_draw.c
+1 -1
View File
@@ -638,7 +638,7 @@ dirty:
FD_DIRTY_BLEND | FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR;
ctx->dirty_shader[MESA_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG;
ctx->dirty_shader[PIPE_SHADER_FRAGMENT] |=
ctx->dirty_shader[MESA_SHADER_FRAGMENT] |=
FD_DIRTY_SHADER_PROG | FD_DIRTY_SHADER_CONST;
return true;
src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+2 -2
View File
@@ -137,7 +137,7 @@ emit_texture(struct fd_ringbuffer *ring, struct fd_context *ctx,
static void
emit_textures(struct fd_ringbuffer *ring, struct fd_context *ctx)
{
struct fd_texture_stateobj *fragtex = &ctx->tex[PIPE_SHADER_FRAGMENT];
struct fd_texture_stateobj *fragtex = &ctx->tex[MESA_SHADER_FRAGMENT];
struct fd_texture_stateobj *verttex = &ctx->tex[MESA_SHADER_VERTEX];
texmask emitted = 0;
unsigned i;
@@ -351,7 +351,7 @@ fd2_emit_state(struct fd_context *ctx, const enum fd_dirty_3d_state dirty)
&ctx->constbuf[MESA_SHADER_VERTEX],
(dirty & FD_DIRTY_PROG) ? ctx->prog.vs : NULL);
emit_constants(ring, PS_CONST_BASE * 4,
&ctx->constbuf[PIPE_SHADER_FRAGMENT],
&ctx->constbuf[MESA_SHADER_FRAGMENT],
(dirty & FD_DIRTY_PROG) ? ctx->prog.fs : NULL);
}
src/gallium/drivers/freedreno/a2xx/fd2_program.c
+1 -1
View File
@@ -177,7 +177,7 @@ fd2_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (prog != &ctx->solid_prog && prog != &ctx->blit_prog[0]) {
patch_fetches(ctx, vpi, ctx->vtx.vtx, &ctx->tex[MESA_SHADER_VERTEX]);
if (fp)
patch_fetches(ctx, fpi, NULL, &ctx->tex[PIPE_SHADER_FRAGMENT]);
patch_fetches(ctx, fpi, NULL, &ctx->tex[MESA_SHADER_FRAGMENT]);
}
emit(ring, MESA_SHADER_VERTEX, vpi,
src/gallium/drivers/freedreno/a2xx/fd2_texture.c
+6 -6
View File
@@ -109,14 +109,14 @@ fd2_sampler_states_bind(struct pipe_context *pctx, enum pipe_shader_type shader,
if (!hwcso)
nr = 0;
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
struct fd_context *ctx = fd_context(pctx);
/* on a2xx, since there is a flat address space for textures/samplers,
* a change in # of fragment textures/samplers will trigger patching and
* re-emitting the vertex shader:
*/
if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers)
if (nr != ctx->tex[MESA_SHADER_FRAGMENT].num_samplers)
ctx->dirty |= FD_DIRTY_TEXSTATE;
}
@@ -188,14 +188,14 @@ fd2_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
unsigned unbind_num_trailing_slots,
struct pipe_sampler_view **views) in_dt
{
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
struct fd_context *ctx = fd_context(pctx);
/* on a2xx, since there is a flat address space for textures/samplers,
* a change in # of fragment textures/samplers will trigger patching and
* re-emitting the vertex shader:
*/
if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_textures)
if (nr != ctx->tex[MESA_SHADER_FRAGMENT].num_textures)
ctx->dirty |= FD_DIRTY_TEXSTATE;
}
@@ -218,9 +218,9 @@ unsigned
fd2_get_const_idx(struct fd_context *ctx, struct fd_texture_stateobj *tex,
unsigned samp_id) assert_dt
{
if (tex == &ctx->tex[PIPE_SHADER_FRAGMENT])
if (tex == &ctx->tex[MESA_SHADER_FRAGMENT])
return samp_id;
return samp_id + ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers;
return samp_id + ctx->tex[MESA_SHADER_FRAGMENT].num_samplers;
}
void
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+2 -2
View File
@@ -813,8 +813,8 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX)
emit_textures(ctx, ring, SB_VERT_TEX, &ctx->tex[MESA_SHADER_VERTEX]);
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX)
emit_textures(ctx, ring, SB_FRAG_TEX, &ctx->tex[PIPE_SHADER_FRAGMENT]);
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX)
emit_textures(ctx, ring, SB_FRAG_TEX, &ctx->tex[MESA_SHADER_FRAGMENT]);
}
/* emit setup at begin of new cmdstream buffer (don't rely on previous
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+6 -6
View File
@@ -897,15 +897,15 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
if (ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX)
emit_textures(ctx, ring, SB4_VS_TEX, &ctx->tex[MESA_SHADER_VERTEX], vp);
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX)
emit_textures(ctx, ring, SB4_FS_TEX, &ctx->tex[PIPE_SHADER_FRAGMENT], fp);
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX)
emit_textures(ctx, ring, SB4_FS_TEX, &ctx->tex[MESA_SHADER_FRAGMENT], fp);
if (!emit->binning_pass) {
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_SSBO)
emit_ssbos(ctx, ring, SB4_SSBO, &ctx->shaderbuf[PIPE_SHADER_FRAGMENT]);
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_SSBO)
emit_ssbos(ctx, ring, SB4_SSBO, &ctx->shaderbuf[MESA_SHADER_FRAGMENT]);
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_IMAGE)
fd4_emit_images(ctx, ring, PIPE_SHADER_FRAGMENT, fp);
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_IMAGE)
fd4_emit_images(ctx, ring, MESA_SHADER_FRAGMENT, fp);
}
}
src/gallium/drivers/freedreno/a4xx/fd4_image.c
+2 -2
View File
@@ -15,12 +15,12 @@
static enum a4xx_state_block texsb[] = {
[PIPE_SHADER_COMPUTE] = SB4_CS_TEX,
[PIPE_SHADER_FRAGMENT] = SB4_FS_TEX,
[MESA_SHADER_FRAGMENT] = SB4_FS_TEX,
};
static enum a4xx_state_block imgsb[] = {
[PIPE_SHADER_COMPUTE] = SB4_CS_SSBO,
[PIPE_SHADER_FRAGMENT] = SB4_SSBO,
[MESA_SHADER_FRAGMENT] = SB4_SSBO,
};
struct fd4_image {
src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+2 -2
View File
@@ -224,7 +224,7 @@ fd4_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
uint16_t *sampler_swizzles;
unsigned i;
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
sampler_swizzles = fd4_ctx->fsampler_swizzles;
} else if (shader == MESA_SHADER_VERTEX) {
sampler_swizzles = fd4_ctx->vsampler_swizzles;
@@ -274,7 +274,7 @@ fd4_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
sampler_swizzles[start + nr + i] = 0x688;
}
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
fd4_ctx->fastc_srgb = astc_srgb;
} else if (shader == MESA_SHADER_VERTEX) {
fd4_ctx->vastc_srgb = astc_srgb;
src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+9 -9
View File
@@ -301,7 +301,7 @@ emit_border_color(struct fd_context *ctx, struct fd_ringbuffer *ring) assert_dt
entries = ptr;
setup_border_colors(&ctx->tex[MESA_SHADER_VERTEX], &entries[0]);
setup_border_colors(&ctx->tex[PIPE_SHADER_FRAGMENT],
setup_border_colors(&ctx->tex[MESA_SHADER_FRAGMENT],
&entries[ctx->tex[MESA_SHADER_VERTEX].num_samplers]);
OUT_PKT4(ring, REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO, 2);
@@ -829,15 +829,15 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, ctx->tex[MESA_SHADER_VERTEX].num_textures);
}
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX) {
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX) {
needs_border |=
emit_textures(ctx, ring, SB4_FS_TEX, &ctx->tex[PIPE_SHADER_FRAGMENT]);
emit_textures(ctx, ring, SB4_FS_TEX, &ctx->tex[MESA_SHADER_FRAGMENT]);
}
OUT_PKT4(ring, REG_A5XX_TPL1_FS_TEX_COUNT, 1);
OUT_RING(ring, ctx->shaderimg[PIPE_SHADER_FRAGMENT].enabled_mask
OUT_RING(ring, ctx->shaderimg[MESA_SHADER_FRAGMENT].enabled_mask
? ~0
: ctx->tex[PIPE_SHADER_FRAGMENT].num_textures);
: ctx->tex[MESA_SHADER_FRAGMENT].num_textures);
OUT_PKT4(ring, REG_A5XX_TPL1_CS_TEX_COUNT, 1);
OUT_RING(ring, 0);
@@ -846,12 +846,12 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
emit_border_color(ctx, ring);
if (!emit->binning_pass) {
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_SSBO)
emit_ssbos(ctx, ring, SB4_SSBO, &ctx->shaderbuf[PIPE_SHADER_FRAGMENT],
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_SSBO)
emit_ssbos(ctx, ring, SB4_SSBO, &ctx->shaderbuf[MESA_SHADER_FRAGMENT],
fp);
if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_IMAGE)
fd5_emit_images(ctx, ring, PIPE_SHADER_FRAGMENT, fp);
if (ctx->dirty_shader[MESA_SHADER_FRAGMENT] & FD_DIRTY_SHADER_IMAGE)
fd5_emit_images(ctx, ring, MESA_SHADER_FRAGMENT, fp);
}
}
src/gallium/drivers/freedreno/a5xx/fd5_image.c
+2 -2
View File
@@ -15,12 +15,12 @@
static enum a4xx_state_block texsb[] = {
[PIPE_SHADER_COMPUTE] = SB4_CS_TEX,
[PIPE_SHADER_FRAGMENT] = SB4_FS_TEX,
[MESA_SHADER_FRAGMENT] = SB4_FS_TEX,
};
static enum a4xx_state_block imgsb[] = {
[PIPE_SHADER_COMPUTE] = SB4_CS_SSBO,
[PIPE_SHADER_FRAGMENT] = SB4_SSBO,
[MESA_SHADER_FRAGMENT] = SB4_SSBO,
};
struct fd5_image {
src/gallium/drivers/freedreno/a6xx/fd6_const.cc
+1 -1
View File
@@ -358,7 +358,7 @@ fd6_build_user_consts(struct fd6_emit *emit)
emit_user_consts<CHIP>(emit->gs, constobj, &ctx->constbuf[MESA_SHADER_GEOMETRY]);
}
}
emit_user_consts<CHIP>(emit->fs, constobj, &ctx->constbuf[PIPE_SHADER_FRAGMENT]);
emit_user_consts<CHIP>(emit->fs, constobj, &ctx->constbuf[MESA_SHADER_FRAGMENT]);
return constobj;
}
src/gallium/drivers/freedreno/a6xx/fd6_context.cc
+3 -3
View File
@@ -185,7 +185,7 @@ setup_state_map(struct fd_context *ctx)
BIT(FD6_GROUP_DS_TEX));
fd_context_add_shader_map(ctx, MESA_SHADER_GEOMETRY, FD_DIRTY_SHADER_TEX,
BIT(FD6_GROUP_GS_TEX));
fd_context_add_shader_map(ctx, PIPE_SHADER_FRAGMENT, FD_DIRTY_SHADER_TEX,
fd_context_add_shader_map(ctx, MESA_SHADER_FRAGMENT, FD_DIRTY_SHADER_TEX,
BIT(FD6_GROUP_FS_TEX));
fd_context_add_shader_map(ctx, PIPE_SHADER_COMPUTE, FD_DIRTY_SHADER_TEX,
BIT(FD6_GROUP_CS_TEX));
@@ -206,13 +206,13 @@ setup_state_map(struct fd_context *ctx)
* state (ie. it needs to be re-generated with fb-read descriptor
* patched in) but this special case is handled in fd6_emit_3d_state()
*/
fd_context_add_shader_map(ctx, PIPE_SHADER_FRAGMENT,
fd_context_add_shader_map(ctx, MESA_SHADER_FRAGMENT,
FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
BIT(FD6_GROUP_FS_BINDLESS));
fd_context_add_shader_map(ctx, PIPE_SHADER_COMPUTE,
FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
BIT(FD6_GROUP_CS_BINDLESS));
fd_context_add_shader_map(ctx, PIPE_SHADER_FRAGMENT,
fd_context_add_shader_map(ctx, MESA_SHADER_FRAGMENT,
FD_DIRTY_SHADER_PROG,
BIT(FD6_GROUP_PRIM_MODE_SYSMEM) | BIT(FD6_GROUP_PRIM_MODE_GMEM));
src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
+2 -2
View File
@@ -675,7 +675,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
fd6_state_take_group(&emit->state, state, FD6_GROUP_GS_BINDLESS);
break;
case FD6_GROUP_FS_BINDLESS:
state = fd6_build_bindless_state<CHIP>(ctx, PIPE_SHADER_FRAGMENT, fs->fb_read);
state = fd6_build_bindless_state<CHIP>(ctx, MESA_SHADER_FRAGMENT, fs->fb_read);
fd6_state_take_group(&emit->state, state, FD6_GROUP_FS_BINDLESS);
break;
case FD6_GROUP_CONST:
@@ -709,7 +709,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
fd6_state_take_group(&emit->state, state, FD6_GROUP_GS_TEX);
break;
case FD6_GROUP_FS_TEX:
state = tex_state(ctx, PIPE_SHADER_FRAGMENT);
state = tex_state(ctx, MESA_SHADER_FRAGMENT);
fd6_state_take_group(&emit->state, state, FD6_GROUP_FS_TEX);
break;
case FD6_GROUP_SO:
src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
+1 -1
View File
@@ -638,7 +638,7 @@ build_texture_state(struct fd_context *ctx, enum pipe_shader_type type,
tex_const_reg = REG_A6XX_SP_GS_TEXMEMOBJ_BASE;
tex_count_reg = REG_A6XX_SP_GS_TSIZE;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
sb = SB6_FS_TEX;
opcode = CP_LOAD_STATE6_FRAG;
tex_samp_reg = REG_A6XX_SP_PS_SAMPLER_BASE;
src/gallium/drivers/freedreno/freedreno_blitter.c
+7 -7
View File
@@ -87,13 +87,13 @@ fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond) assert_dt
util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask, 1 /* min_samples -- unused in freedreno */);
util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer);
util_blitter_save_fragment_sampler_states(
ctx->blitter, ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers,
(void **)ctx->tex[PIPE_SHADER_FRAGMENT].samplers);
ctx->blitter, ctx->tex[MESA_SHADER_FRAGMENT].num_samplers,
(void **)ctx->tex[MESA_SHADER_FRAGMENT].samplers);
util_blitter_save_fragment_sampler_views(
ctx->blitter, ctx->tex[PIPE_SHADER_FRAGMENT].num_textures,
ctx->tex[PIPE_SHADER_FRAGMENT].textures);
ctx->blitter, ctx->tex[MESA_SHADER_FRAGMENT].num_textures,
ctx->tex[MESA_SHADER_FRAGMENT].textures);
util_blitter_save_fragment_constant_buffer_slot(ctx->blitter,
ctx->constbuf[PIPE_SHADER_FRAGMENT].cb);
ctx->constbuf[MESA_SHADER_FRAGMENT].cb);
if (!render_cond)
util_blitter_save_render_condition(ctx->blitter, ctx->cond_query,
ctx->cond_cond, ctx->cond_mode);
@@ -158,7 +158,7 @@ build_f16_copy_fs_shader(struct pipe_screen *pscreen, enum pipe_texture_target t
[PIPE_TEXTURE_CUBE_ARRAY] = GLSL_SAMPLER_DIM_CUBE,
};
const nir_shader_compiler_options *options = pscreen->nir_options[PIPE_SHADER_FRAGMENT];
const nir_shader_compiler_options *options = pscreen->nir_options[MESA_SHADER_FRAGMENT];
nir_builder _b =
nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT, options,
"f16 copy %s fs",
@@ -292,7 +292,7 @@ fd_blitter_clear(struct pipe_context *pctx, unsigned buffers,
.buffer_size = 16,
.user_buffer = &color->ui,
};
pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, false, &cb);
pctx->set_constant_buffer(pctx, MESA_SHADER_FRAGMENT, 0, false, &cb);
unsigned rs_idx = pfb->samples > 1 ? 1 : 0;
if (!ctx->clear_rs_state[rs_idx]) {
src/gallium/drivers/freedreno/freedreno_program.c
+3 -3
View File
@@ -108,8 +108,8 @@ fd_fs_state_bind(struct pipe_context *pctx, void *hwcso) in_dt
{
struct fd_context *ctx = fd_context(pctx);
ctx->prog.fs = hwcso;
fd_context_dirty_shader(ctx, PIPE_SHADER_FRAGMENT, FD_DIRTY_SHADER_PROG);
update_bound_stage(ctx, PIPE_SHADER_FRAGMENT, !!hwcso);
fd_context_dirty_shader(ctx, MESA_SHADER_FRAGMENT, FD_DIRTY_SHADER_PROG);
update_bound_stage(ctx, MESA_SHADER_FRAGMENT, !!hwcso);
}
static const char *solid_fs = "FRAG \n"
@@ -187,7 +187,7 @@ fd_prog_blit_fs(struct pipe_context *pctx, int rts, bool depth)
assert(rts <= MAX_RENDER_TARGETS);
ureg = ureg_create(PIPE_SHADER_FRAGMENT);
ureg = ureg_create(MESA_SHADER_FRAGMENT);
if (!ureg)
return NULL;
src/gallium/drivers/freedreno/freedreno_screen.c
+3 -3
View File
@@ -261,7 +261,7 @@ fd_init_shader_caps(struct fd_screen *screen)
caps->int16 =
caps->fp16 =
(is_a5xx(screen) || is_a6xx(screen)) &&
(i == PIPE_SHADER_COMPUTE || i == PIPE_SHADER_FRAGMENT) &&
(i == PIPE_SHADER_COMPUTE || i == MESA_SHADER_FRAGMENT) &&
!FD_DBG(NOFP16);
caps->glsl_16bit_load_dst = true;
@@ -272,7 +272,7 @@ fd_init_shader_caps(struct fd_screen *screen)
(1 << PIPE_SHADER_IR_NIR) |
/* tgsi_to_nir doesn't support all stages: */
COND(i == MESA_SHADER_VERTEX ||
i == PIPE_SHADER_FRAGMENT ||
i == MESA_SHADER_FRAGMENT ||
i == PIPE_SHADER_COMPUTE,
1 << PIPE_SHADER_IR_TGSI);
@@ -302,7 +302,7 @@ fd_init_shader_caps(struct fd_screen *screen)
* but images also need texture state for read access
* (isam/isam.3d)
*/
if (i == PIPE_SHADER_FRAGMENT || i == PIPE_SHADER_COMPUTE) {
if (i == MESA_SHADER_FRAGMENT || i == PIPE_SHADER_COMPUTE) {
caps->max_shader_buffers =
caps->max_shader_images = 24;
}
src/gallium/drivers/freedreno/ir3/ir3_const.h
+1 -1
View File
@@ -587,7 +587,7 @@ ir3_emit_fs_consts(const struct ir3_shader_variant *v,
{
assert(v->type == MESA_SHADER_FRAGMENT);
emit_common_consts(v, ring, ctx, PIPE_SHADER_FRAGMENT);
emit_common_consts(v, ring, ctx, MESA_SHADER_FRAGMENT);
}
static inline struct ir3_driver_params_cs
src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
+1 -1
View File
@@ -39,7 +39,7 @@ ir3_shader_descriptor_set(enum pipe_shader_type shader)
case MESA_SHADER_TESS_CTRL: return 1;
case MESA_SHADER_TESS_EVAL: return 2;
case MESA_SHADER_GEOMETRY: return 3;
case PIPE_SHADER_FRAGMENT: return 4;
case MESA_SHADER_FRAGMENT: return 4;
case PIPE_SHADER_COMPUTE: return 0;
case MESA_SHADER_KERNEL: return 0;
default:
src/gallium/drivers/freedreno/ir3/ir3_gallium.c
+2 -2
View File
@@ -464,7 +464,7 @@ ir3_fixup_shader_state(struct pipe_context *pctx, struct ir3_shader_key *key)
if (!ir3_shader_key_equal(ctx->last.key, key)) {
if (ir3_shader_key_changes_fs(ctx->last.key, key)) {
fd_context_dirty_shader(ctx, PIPE_SHADER_FRAGMENT,
fd_context_dirty_shader(ctx, MESA_SHADER_FRAGMENT,
FD_DIRTY_SHADER_PROG);
}
@@ -542,7 +542,7 @@ ir3_screen_init(struct pipe_screen *pscreen)
struct ir3_compiler_options options = {
.bindless_fb_read_descriptor =
ir3_shader_descriptor_set(PIPE_SHADER_FRAGMENT),
ir3_shader_descriptor_set(MESA_SHADER_FRAGMENT),
.bindless_fb_read_slot = IR3_BINDLESS_IMAGE_OFFSET +
IR3_BINDLESS_IMAGE_COUNT - 1 - screen->max_rts,
.dual_color_blend_by_location = screen->driconf.dual_color_blend_by_location,
src/gallium/drivers/i915/i915_screen.c
+2 -2
View File
@@ -281,7 +281,7 @@ i915_init_shader_caps(struct i915_screen *is)
caps->max_shader_buffers = false;
caps->max_shader_images = false;
caps = (struct pipe_shader_caps *)&is->base.shader_caps[PIPE_SHADER_FRAGMENT];
caps = (struct pipe_shader_caps *)&is->base.shader_caps[MESA_SHADER_FRAGMENT];
caps->supported_irs = (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
/* XXX: some of these are just shader model 2.0 values, fix this! */
@@ -558,7 +558,7 @@ i915_screen_create(struct i915_winsys *iws)
is->base.fence_finish = i915_fence_finish;
is->base.nir_options[MESA_SHADER_VERTEX] = &gallivm_nir_options;
is->base.nir_options[PIPE_SHADER_FRAGMENT] = &i915_compiler_options;
is->base.nir_options[MESA_SHADER_FRAGMENT] = &i915_compiler_options;
i915_init_screen_resource_functions(is);
src/gallium/drivers/i915/i915_state.c
+2 -2
View File
@@ -353,7 +353,7 @@ i915_bind_sampler_states(struct pipe_context *pipe,
enum pipe_shader_type shader, unsigned start,
unsigned num, void **samplers)
{
if (shader != PIPE_SHADER_FRAGMENT) {
if (shader != MESA_SHADER_FRAGMENT) {
assert(num == 0);
return;
}
@@ -784,7 +784,7 @@ i915_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
unsigned unbind_num_trailing_slots,
struct pipe_sampler_view **views)
{
if (shader != PIPE_SHADER_FRAGMENT) {
if (shader != MESA_SHADER_FRAGMENT) {
/* No support for VS samplers, because it would mean accessing the
* write-combined maps of the textures, which is very slow. VS samplers
* are not a required feature of GL2.1 or GLES2.
src/gallium/drivers/i915/i915_state_emit.c
+1 -1
View File
@@ -335,7 +335,7 @@ emit_constants(struct i915_context *i915)
const uint32_t *c;
if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
/* grab user-defined constant */
c = (uint32_t *)i915_buffer(i915->constants[PIPE_SHADER_FRAGMENT])
c = (uint32_t *)i915_buffer(i915->constants[MESA_SHADER_FRAGMENT])
->data;
c += 4 * i;
} else {
src/gallium/drivers/iris/iris_screen.c
+2 -2
View File
@@ -205,10 +205,10 @@ iris_init_shader_caps(struct iris_screen *screen)
struct pipe_shader_caps *caps =
(struct pipe_shader_caps *)&screen->base.shader_caps[i];
caps->max_instructions = i == PIPE_SHADER_FRAGMENT ? 1024 : 16384;
caps->max_instructions = i == MESA_SHADER_FRAGMENT ? 1024 : 16384;
caps->max_alu_instructions =
caps->max_tex_instructions =
caps->max_tex_indirections = i == PIPE_SHADER_FRAGMENT ? 1024 : 0;
caps->max_tex_indirections = i == MESA_SHADER_FRAGMENT ? 1024 : 0;
caps->max_control_flow_depth = UINT_MAX;
src/gallium/drivers/lima/lima_draw.c
+5 -5
View File
@@ -713,7 +713,7 @@ lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *in
state.has_samplers = true;
}
if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
if (ctx->const_buffer[MESA_SHADER_FRAGMENT].buffer) {
state.uniforms_address = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array);
uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
uint32_t uniform_count = 0;
@@ -866,8 +866,8 @@ lima_update_gp_uniform(struct lima_context *ctx)
static void
lima_update_pp_uniform(struct lima_context *ctx)
{
const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
const float *const_buff = ctx->const_buffer[MESA_SHADER_FRAGMENT].buffer;
size_t const_buff_size = ctx->const_buffer[MESA_SHADER_FRAGMENT].size / sizeof(float);
if (!const_buff)
return;
@@ -1016,9 +1016,9 @@ lima_draw_vbo_update(struct pipe_context *pctx,
lima_pack_vs_cmd(ctx, info, draw);
if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
ctx->const_buffer[MESA_SHADER_FRAGMENT].dirty) {
lima_update_pp_uniform(ctx);
ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
ctx->const_buffer[MESA_SHADER_FRAGMENT].dirty = false;
}
lima_update_textures(ctx);
src/gallium/drivers/lima/lima_program.c
+1 -1
View File
@@ -96,7 +96,7 @@ lima_program_get_compiler_options(enum pipe_shader_type shader)
switch (shader) {
case MESA_SHADER_VERTEX:
return &vs_nir_options;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
return &fs_nir_options;
default:
return NULL;
src/gallium/drivers/lima/lima_screen.c
+1 -1
View File
@@ -114,7 +114,7 @@ lima_init_shader_caps(struct pipe_screen *screen)
caps->max_const_buffers = 1;
caps->max_temps = 256; /* need investigate */
caps = (struct pipe_shader_caps *)&screen->shader_caps[PIPE_SHADER_FRAGMENT];
caps = (struct pipe_shader_caps *)&screen->shader_caps[MESA_SHADER_FRAGMENT];
caps->max_instructions =
caps->max_alu_instructions =
src/gallium/drivers/llvmpipe/lp_screen.c
+1 -1
View File
@@ -127,7 +127,7 @@ llvmpipe_init_shader_caps(struct pipe_screen *screen)
struct pipe_shader_caps *caps = (struct pipe_shader_caps *)&screen->shader_caps[i];
switch (i) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
case PIPE_SHADER_COMPUTE:
case PIPE_SHADER_MESH:
case PIPE_SHADER_TASK:
src/gallium/drivers/llvmpipe/lp_setup.c
+2 -2
View File
@@ -1052,8 +1052,8 @@ try_update_scene_state(struct lp_setup_context *setup)
struct llvmpipe_context *llvmpipe = llvmpipe_context(setup->pipe);
if (llvmpipe->dirty & LP_NEW_FS_CONSTANTS)
lp_setup_set_fs_constants(llvmpipe->setup,
ARRAY_SIZE(llvmpipe->constants[PIPE_SHADER_FRAGMENT]),
llvmpipe->constants[PIPE_SHADER_FRAGMENT]);
ARRAY_SIZE(llvmpipe->constants[MESA_SHADER_FRAGMENT]),
llvmpipe->constants[MESA_SHADER_FRAGMENT]);
if (setup->dirty & LP_SETUP_NEW_CONSTANTS) {
for (unsigned i = 0; i < ARRAY_SIZE(setup->constants); ++i) {
src/gallium/drivers/llvmpipe/lp_state_derived.c
+10 -10
View File
@@ -343,28 +343,28 @@ llvmpipe_update_derived(struct llvmpipe_context *llvmpipe)
if (llvmpipe->dirty & LP_NEW_FS_CONSTANTS)
lp_setup_set_fs_constants(llvmpipe->setup,
ARRAY_SIZE(llvmpipe->constants[PIPE_SHADER_FRAGMENT]),
llvmpipe->constants[PIPE_SHADER_FRAGMENT]);
ARRAY_SIZE(llvmpipe->constants[MESA_SHADER_FRAGMENT]),
llvmpipe->constants[MESA_SHADER_FRAGMENT]);
if (llvmpipe->dirty & LP_NEW_FS_SSBOS)
lp_setup_set_fs_ssbos(llvmpipe->setup,
ARRAY_SIZE(llvmpipe->ssbos[PIPE_SHADER_FRAGMENT]),
llvmpipe->ssbos[PIPE_SHADER_FRAGMENT], llvmpipe->fs_ssbo_write_mask);
ARRAY_SIZE(llvmpipe->ssbos[MESA_SHADER_FRAGMENT]),
llvmpipe->ssbos[MESA_SHADER_FRAGMENT], llvmpipe->fs_ssbo_write_mask);
if (llvmpipe->dirty & LP_NEW_FS_IMAGES)
lp_setup_set_fs_images(llvmpipe->setup,
ARRAY_SIZE(llvmpipe->images[PIPE_SHADER_FRAGMENT]),
llvmpipe->images[PIPE_SHADER_FRAGMENT]);
ARRAY_SIZE(llvmpipe->images[MESA_SHADER_FRAGMENT]),
llvmpipe->images[MESA_SHADER_FRAGMENT]);
if (llvmpipe->dirty & (LP_NEW_SAMPLER_VIEW))
lp_setup_set_fragment_sampler_views(llvmpipe->setup,
llvmpipe->num_sampler_views[PIPE_SHADER_FRAGMENT],
llvmpipe->sampler_views[PIPE_SHADER_FRAGMENT]);
llvmpipe->num_sampler_views[MESA_SHADER_FRAGMENT],
llvmpipe->sampler_views[MESA_SHADER_FRAGMENT]);
if (llvmpipe->dirty & (LP_NEW_SAMPLER))
lp_setup_set_fragment_sampler_state(llvmpipe->setup,
llvmpipe->num_samplers[PIPE_SHADER_FRAGMENT],
llvmpipe->samplers[PIPE_SHADER_FRAGMENT]);
llvmpipe->num_samplers[MESA_SHADER_FRAGMENT],
llvmpipe->samplers[MESA_SHADER_FRAGMENT]);
if (llvmpipe->dirty & LP_NEW_VIEWPORT) {
/*
src/gallium/drivers/llvmpipe/lp_state_fs.c
+7 -7
View File
@@ -4263,7 +4263,7 @@ llvmpipe_set_constant_buffer(struct pipe_context *pipe,
case PIPE_SHADER_COMPUTE:
llvmpipe->cs_dirty |= LP_CSNEW_CONSTANTS;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
llvmpipe->dirty |= LP_NEW_FS_CONSTANTS;
break;
case PIPE_SHADER_TASK:
@@ -4324,7 +4324,7 @@ llvmpipe_set_shader_buffers(struct pipe_context *pipe,
case PIPE_SHADER_MESH:
llvmpipe->dirty |= LP_NEW_MESH_SSBOS;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
llvmpipe->fs_ssbo_write_mask &= ~(((1 << count) - 1) << start_slot);
llvmpipe->fs_ssbo_write_mask |= writable_bitmask << start_slot;
llvmpipe->dirty |= LP_NEW_FS_SSBOS;
@@ -4371,7 +4371,7 @@ llvmpipe_set_shader_images(struct pipe_context *pipe,
case PIPE_SHADER_COMPUTE:
llvmpipe->cs_dirty |= LP_CSNEW_IMAGES;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
llvmpipe->dirty |= LP_NEW_FS_IMAGES;
break;
case PIPE_SHADER_TASK:
@@ -4623,7 +4623,7 @@ make_variant_key(struct llvmpipe_context *lp,
for (unsigned i = 0; i < key->nr_samplers; ++i) {
if (BITSET_TEST(nir->info.samplers_used, i)) {
lp_sampler_static_sampler_state(&fs_sampler[i].sampler_state,
lp->samplers[PIPE_SHADER_FRAGMENT][i]);
lp->samplers[MESA_SHADER_FRAGMENT][i]);
}
}
@@ -4641,7 +4641,7 @@ make_variant_key(struct llvmpipe_context *lp,
*/
if (BITSET_TEST(nir->info.textures_used, i)) {
lp_sampler_static_texture_state(&fs_sampler[i].texture_state,
lp->sampler_views[PIPE_SHADER_FRAGMENT][i]);
lp->sampler_views[MESA_SHADER_FRAGMENT][i]);
}
}
} else {
@@ -4649,7 +4649,7 @@ make_variant_key(struct llvmpipe_context *lp,
for (unsigned i = 0; i < key->nr_sampler_views; ++i) {
if (BITSET_TEST(nir->info.samplers_used, i)) {
lp_sampler_static_texture_state(&fs_sampler[i].texture_state,
lp->sampler_views[PIPE_SHADER_FRAGMENT][i]);
lp->sampler_views[MESA_SHADER_FRAGMENT][i]);
}
}
}
@@ -4662,7 +4662,7 @@ make_variant_key(struct llvmpipe_context *lp,
for (unsigned i = 0; i < key->nr_images; ++i) {
if (BITSET_TEST(nir->info.images_used, i)) {
lp_sampler_static_texture_state_image(&lp_image[i].image_state,
&lp->images[PIPE_SHADER_FRAGMENT][i]);
&lp->images[MESA_SHADER_FRAGMENT][i]);
}
}
src/gallium/drivers/llvmpipe/lp_state_sampler.c
+4 -4
View File
@@ -109,7 +109,7 @@ llvmpipe_bind_sampler_states(struct pipe_context *pipe,
case PIPE_SHADER_COMPUTE:
llvmpipe->cs_dirty |= LP_CSNEW_SAMPLER;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
llvmpipe->dirty |= LP_NEW_SAMPLER;
break;
case PIPE_SHADER_TASK:
@@ -192,11 +192,11 @@ llvmpipe_set_sampler_views(struct pipe_context *pipe,
case PIPE_SHADER_COMPUTE:
llvmpipe->cs_dirty |= LP_CSNEW_SAMPLER_VIEW;
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
llvmpipe->dirty |= LP_NEW_SAMPLER_VIEW;
lp_setup_set_fragment_sampler_views(llvmpipe->setup,
llvmpipe->num_sampler_views[PIPE_SHADER_FRAGMENT],
llvmpipe->sampler_views[PIPE_SHADER_FRAGMENT]);
llvmpipe->num_sampler_views[MESA_SHADER_FRAGMENT],
llvmpipe->sampler_views[MESA_SHADER_FRAGMENT]);
break;
case PIPE_SHADER_TASK:
llvmpipe->dirty |= LP_NEW_TASK_SAMPLER_VIEW;
src/gallium/drivers/llvmpipe/lp_surface.c
+4 -4
View File
@@ -183,11 +183,11 @@ lp_blit(struct pipe_context *pipe,
lp->min_samples);
util_blitter_save_framebuffer(lp->blitter, &lp->framebuffer);
util_blitter_save_fragment_sampler_states(lp->blitter,
lp->num_samplers[PIPE_SHADER_FRAGMENT],
(void**)lp->samplers[PIPE_SHADER_FRAGMENT]);
lp->num_samplers[MESA_SHADER_FRAGMENT],
(void**)lp->samplers[MESA_SHADER_FRAGMENT]);
util_blitter_save_fragment_sampler_views(lp->blitter,
lp->num_sampler_views[PIPE_SHADER_FRAGMENT],
lp->sampler_views[PIPE_SHADER_FRAGMENT]);
lp->num_sampler_views[MESA_SHADER_FRAGMENT],
lp->sampler_views[MESA_SHADER_FRAGMENT]);
util_blitter_save_render_condition(lp->blitter, lp->render_cond_query,
lp->render_cond_cond,
lp->render_cond_mode);
src/gallium/drivers/llvmpipe/lp_texture.c
+2 -2
View File
@@ -950,8 +950,8 @@ llvmpipe_transfer_map_ms(struct pipe_context *pipe,
if ((usage & PIPE_MAP_WRITE) &&
(resource->bind & PIPE_BIND_CONSTANT_BUFFER)) {
unsigned i;
for (i = 0; i < ARRAY_SIZE(llvmpipe->constants[PIPE_SHADER_FRAGMENT]); ++i) {
if (resource == llvmpipe->constants[PIPE_SHADER_FRAGMENT][i].buffer) {
for (i = 0; i < ARRAY_SIZE(llvmpipe->constants[MESA_SHADER_FRAGMENT]); ++i) {
if (resource == llvmpipe->constants[MESA_SHADER_FRAGMENT][i].buffer) {
/* constants may have changed */
llvmpipe->dirty |= LP_NEW_FS_CONSTANTS;
break;
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+10 -10
View File
@@ -3635,13 +3635,13 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
op.intel_vec4 = false;
op.lower_uniforms_to_ubo = true;
op.force_indirect_unrolling = (nir_variable_mode) (
((shader_type == PIPE_SHADER_FRAGMENT) ? nir_var_shader_out : 0) |
((shader_type == MESA_SHADER_FRAGMENT) ? nir_var_shader_out : 0) |
/* HW doesn't support indirect addressing of fragment program inputs
* on Volta. The binary driver generates a function to handle every
* possible indirection, and indirectly calls the function to handle
* this instead.
*/
((chipset >= NVISA_GV100_CHIPSET && shader_type == PIPE_SHADER_FRAGMENT) ? nir_var_shader_in : 0)
((chipset >= NVISA_GV100_CHIPSET && shader_type == MESA_SHADER_FRAGMENT) ? nir_var_shader_in : 0)
);
op.force_indirect_unrolling_sampler = (chipset < NVISA_GF100_CHIPSET);
op.max_unroll_iterations = 32;
@@ -3691,25 +3691,25 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
static const nir_shader_compiler_options g80_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_G80_CHIPSET, PIPE_SHADER_TYPES);
static const nir_shader_compiler_options g80_fs_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_G80_CHIPSET, PIPE_SHADER_FRAGMENT);
nvir_nir_shader_compiler_options(NVISA_G80_CHIPSET, MESA_SHADER_FRAGMENT);
static const nir_shader_compiler_options gf100_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_GF100_CHIPSET, PIPE_SHADER_TYPES);
static const nir_shader_compiler_options gf100_fs_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_GF100_CHIPSET, PIPE_SHADER_FRAGMENT);
nvir_nir_shader_compiler_options(NVISA_GF100_CHIPSET, MESA_SHADER_FRAGMENT);
static const nir_shader_compiler_options gm107_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_GM107_CHIPSET, PIPE_SHADER_TYPES);
static const nir_shader_compiler_options gm107_fs_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_GM107_CHIPSET, PIPE_SHADER_FRAGMENT);
nvir_nir_shader_compiler_options(NVISA_GM107_CHIPSET, MESA_SHADER_FRAGMENT);
static const nir_shader_compiler_options gv100_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_GV100_CHIPSET, PIPE_SHADER_TYPES);
static const nir_shader_compiler_options gv100_fs_nir_shader_compiler_options =
nvir_nir_shader_compiler_options(NVISA_GV100_CHIPSET, PIPE_SHADER_FRAGMENT);
nvir_nir_shader_compiler_options(NVISA_GV100_CHIPSET, MESA_SHADER_FRAGMENT);
const nir_shader_compiler_options *
nv50_ir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
{
if (chipset >= NVISA_GV100_CHIPSET) {
if (shader_type == PIPE_SHADER_FRAGMENT) {
if (shader_type == MESA_SHADER_FRAGMENT) {
return &gv100_fs_nir_shader_compiler_options;
} else {
return &gv100_nir_shader_compiler_options;
@@ -3717,7 +3717,7 @@ nv50_ir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
}
if (chipset >= NVISA_GM107_CHIPSET) {
if (shader_type == PIPE_SHADER_FRAGMENT) {
if (shader_type == MESA_SHADER_FRAGMENT) {
return &gm107_fs_nir_shader_compiler_options;
} else {
return &gm107_nir_shader_compiler_options;
@@ -3725,14 +3725,14 @@ nv50_ir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
}
if (chipset >= NVISA_GF100_CHIPSET) {
if (shader_type == PIPE_SHADER_FRAGMENT) {
if (shader_type == MESA_SHADER_FRAGMENT) {
return &gf100_fs_nir_shader_compiler_options;
} else {
return &gf100_nir_shader_compiler_options;
}
}
if (shader_type == PIPE_SHADER_FRAGMENT) {
if (shader_type == MESA_SHADER_FRAGMENT) {
return &g80_fs_nir_shader_compiler_options;
} else {
return &g80_nir_shader_compiler_options;
src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
+1 -1
View File
@@ -998,7 +998,7 @@ nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *info_out)
INFO(" \"instancesCount\":\"%d\"\n", info_out->prop.gp.instanceCount);
INFO(" \"maxVertices\":\"%d\"\n", info_out->prop.gp.maxVertices);
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
INFO(" \"fp\":{\n");
INFO(" \"numColourResults\":\"%d\"\n", info_out->prop.fp.numColourResults);
INFO(" \"writesDepth\":\"%s\"\n", info_out->prop.fp.writesDepth ? "true" : "false");
src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
+2 -2
View File
@@ -119,7 +119,7 @@ nv50_ir_prog_info_out_serialize(struct blob *blob,
case MESA_SHADER_GEOMETRY:
blob_write_bytes(blob, &info_out->prop.gp, sizeof(info_out->prop.gp));
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
blob_write_bytes(blob, &info_out->prop.fp, sizeof(info_out->prop.fp));
break;
case PIPE_SHADER_COMPUTE:
@@ -239,7 +239,7 @@ nv50_ir_prog_info_out_deserialize(void *data, size_t size, size_t offset,
case MESA_SHADER_GEOMETRY:
blob_copy_bytes(&reader, &info_out->prop.gp, sizeof(info_out->prop.gp));
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
blob_copy_bytes(&reader, &info_out->prop.fp, sizeof(info_out->prop.fp));
break;
case PIPE_SHADER_COMPUTE:
src/gallium/drivers/nouveau/nv30/nv30_fragtex.c
+1 -1
View File
@@ -204,7 +204,7 @@ nv30_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
{
assert(start == 0);
switch (shader) {
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
nv30_fragtex_set_sampler_views(pipe, nr, views);
break;
case MESA_SHADER_VERTEX:
src/gallium/drivers/nouveau/nv30/nv30_screen.c
+1 -1
View File
@@ -68,7 +68,7 @@ nv30_init_shader_caps(struct nv30_screen *screen)
caps->max_temps = (eng3d->oclass >= NV40_3D_CLASS) ? 32 : 13;
caps->supported_irs = (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
caps = (struct pipe_shader_caps *)&screen->base.base.shader_caps[PIPE_SHADER_FRAGMENT];
caps = (struct pipe_shader_caps *)&screen->base.base.shader_caps[MESA_SHADER_FRAGMENT];
caps->max_instructions =
caps->max_alu_instructions =
src/gallium/drivers/nouveau/nv30/nv30_state.c
+1 -1
View File
@@ -355,7 +355,7 @@ nv30_set_constant_buffer(struct pipe_context *pipe,
nv30->vertprog.constbuf_nr = size;
nv30->dirty |= NV30_NEW_VERTCONST;
} else
if (shader == PIPE_SHADER_FRAGMENT) {
if (shader == MESA_SHADER_FRAGMENT) {
if (pass_reference) {
pipe_resource_reference(&nv30->fragprog.constbuf, NULL);
nv30->fragprog.constbuf = buf;
src/gallium/drivers/nouveau/nv30/nv30_texture.c
+1 -1
View File
@@ -195,7 +195,7 @@ nv30_bind_sampler_states(struct pipe_context *pipe,
case MESA_SHADER_VERTEX:
nv40_verttex_sampler_states_bind(pipe, num_samplers, samplers);
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
nv30_fragtex_sampler_states_bind(pipe, num_samplers, samplers);
break;
default:
src/gallium/drivers/nouveau/nv50/nv50_context.h
+1 -1
View File
@@ -248,7 +248,7 @@ nv50_context_shader_stage(unsigned pipe)
{
switch (pipe) {
case MESA_SHADER_VERTEX: return NV50_SHADER_STAGE_VERTEX;
case PIPE_SHADER_FRAGMENT: return NV50_SHADER_STAGE_FRAGMENT;
case MESA_SHADER_FRAGMENT: return NV50_SHADER_STAGE_FRAGMENT;
case MESA_SHADER_GEOMETRY: return NV50_SHADER_STAGE_GEOMETRY;
case PIPE_SHADER_COMPUTE: return NV50_SHADER_STAGE_COMPUTE;
default:
src/gallium/drivers/nouveau/nv50/nv50_program.c
+3 -3
View File
@@ -260,7 +260,7 @@ nv50_program_assign_varying_slots(struct nv50_ir_prog_info_out *info)
return nv50_vertprog_assign_slots(info);
case MESA_SHADER_GEOMETRY:
return nv50_vertprog_assign_slots(info);
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
return nv50_fragprog_assign_slots(info);
case PIPE_SHADER_COMPUTE:
return 0;
@@ -406,7 +406,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t chipset,
for (i = 0; i < info_out.io.cullDistances; ++i)
prog->vp.clip_mode |= 1 << ((info_out.io.clipDistances + i) * 4);
if (prog->type == PIPE_SHADER_FRAGMENT) {
if (prog->type == MESA_SHADER_FRAGMENT) {
if (info_out.prop.fp.writesDepth) {
prog->fp.flags[0] |= NV50_3D_FP_CONTROL_EXPORTS_Z;
prog->fp.flags[1] = 0x11;
@@ -467,7 +467,7 @@ nv50_program_upload_code(struct nv50_context *nv50, struct nv50_program *prog)
switch (prog->type) {
case MESA_SHADER_VERTEX: heap = nv50->screen->vp_code_heap; break;
case MESA_SHADER_GEOMETRY: heap = nv50->screen->gp_code_heap; break;
case PIPE_SHADER_FRAGMENT: heap = nv50->screen->fp_code_heap; break;
case MESA_SHADER_FRAGMENT: heap = nv50->screen->fp_code_heap; break;
case PIPE_SHADER_COMPUTE: heap = nv50->screen->fp_code_heap; break;
default:
assert(!"invalid program type");
src/gallium/drivers/nouveau/nv50/nv50_state.c
+1 -1
View File
@@ -798,7 +798,7 @@ static void *
nv50_fp_state_create(struct pipe_context *pipe,
const struct pipe_shader_state *cso)
{
return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
return nv50_sp_state_create(pipe, cso, MESA_SHADER_FRAGMENT);
}
static void
src/gallium/drivers/nouveau/nv50/nv50_surface.c
+1 -1
View File
@@ -867,7 +867,7 @@ nv50_blitter_make_fp(struct pipe_context *pipe,
const int chipset = nouveau_screen(pipe->screen)->device->chipset;
const nir_shader_compiler_options *options =
nv50_ir_nir_shader_compiler_options(chipset, PIPE_SHADER_FRAGMENT);
nv50_ir_nir_shader_compiler_options(chipset, MESA_SHADER_FRAGMENT);
struct nir_builder b =
nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT, options,
src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+1 -1
View File
@@ -300,7 +300,7 @@ nvc0_shader_stage(unsigned pipe)
case MESA_SHADER_TESS_CTRL: return 1;
case MESA_SHADER_TESS_EVAL: return 2;
case MESA_SHADER_GEOMETRY: return 3;
case PIPE_SHADER_FRAGMENT: return 4;
case MESA_SHADER_FRAGMENT: return 4;
case PIPE_SHADER_COMPUTE: return 5;
default:
assert(!"invalid PIPE_SHADER type");
src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+2 -2
View File
@@ -193,7 +193,7 @@ nvc0_program_assign_varying_slots(struct nv50_ir_prog_info_out *info)
if (ret)
return ret;
if (info->type == PIPE_SHADER_FRAGMENT)
if (info->type == MESA_SHADER_FRAGMENT)
ret = nvc0_fp_assign_output_slots(info);
else
ret = nvc0_sp_assign_output_slots(info);
@@ -702,7 +702,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
case MESA_SHADER_GEOMETRY:
ret = nvc0_gp_gen_header(prog, &info_out);
break;
case PIPE_SHADER_FRAGMENT:
case MESA_SHADER_FRAGMENT:
ret = nvc0_fp_gen_header(prog, &info_out);
break;
case PIPE_SHADER_COMPUTE:

Some files were not shown because too many files have changed in this diff Show More