blorp: disable PS shaders with depth/stencil HiZ ops

Found on simulation, complaining about SIMD32 shaders enabled when
using MSAA 16x.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30753>
This commit is contained in:
Lionel Landwerlin
2024-08-21 10:10:31 +03:00
committed by Marge Bot
parent 1043187ec6
commit 10a4dc529f
+12
View File
@@ -1467,6 +1467,18 @@ blorp_emit_gfx8_hiz_op(struct blorp_batch *batch,
if (params->depth.enabled && params->hiz_op == ISL_AUX_OP_FAST_CLEAR)
blorp_emit_cc_viewport(batch);
/* Make sure to disable fragment shader, a previous draw might have enabled
* a SIMD32 shader and we could be dispatching threads here with MSAA 16x
* which does not support SIMD32.
*
* dEQP-VK.pipeline.monolithic.multisample.misc.clear_attachments.
* r8g8b8a8_unorm_r16g16b16a16_sfloat_r32g32b32a32_uint_d16_unorm.
* 16x.ds_resolve_sample_zero.sub_framebuffer
* exercises this case.
*/
blorp_emit(batch, GENX(3DSTATE_PS), ps);
blorp_emit(batch, GENX(3DSTATE_PS_EXTRA), psx);
/* According to the SKL PRM formula for WM_INT::ThreadDispatchEnable, the
* 3DSTATE_WM::ForceThreadDispatchEnable field can force WM thread dispatch
* even when WM_HZ_OP is active. However, WM thread dispatch is normally