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radv: add a new dirty bit for the tess domain origin state

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36912>
This commit is contained in:
Samuel Pitoiset
2025-08-21 10:51:05 +02:00
committed by Marge Bot
parent d0126f5ced
commit 0c3680bea3
2 changed files with 15 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/radv_cmd_buffer.c
+13 -5
View File
@@ -5225,7 +5225,7 @@ radv_emit_vs_prolog_state(struct radv_cmd_buffer *cmd_buffer)
}
static void
radv_emit_tess_domain_origin(struct radv_cmd_buffer *cmd_buffer)
radv_emit_tess_domain_origin_state(struct radv_cmd_buffer *cmd_buffer)
{
struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
const struct radv_physical_device *pdev = radv_device_physical(device);
@@ -5234,6 +5234,10 @@ radv_emit_tess_domain_origin(struct radv_cmd_buffer *cmd_buffer)
unsigned type = 0, partitioning = 0;
unsigned topology;
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE;
if (!tes)
return;
switch (tes->info.tes._primitive_mode) {
case TESS_PRIMITIVE_TRIANGLES:
type = V_028B6C_TESS_TRIANGLE;
@@ -5395,9 +5399,6 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, const ui
if (states & RADV_DYNAMIC_PATCH_CONTROL_POINTS)
radv_emit_patch_control_points(cmd_buffer);
if (states & RADV_DYNAMIC_TESS_DOMAIN_ORIGIN)
radv_emit_tess_domain_origin(cmd_buffer);
/* RADV_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE is handled by radv_emit_db_shader_control. */
cmd_buffer->state.dirty_dynamic &= ~states;
@@ -7431,7 +7432,8 @@ radv_bind_tess_ctrl_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv
/* Always re-emit patch control points/domain origin when a new pipeline with tessellation is
* bound because a bunch of parameters (user SGPRs, TCS vertices out, ccw, etc) can be different.
*/
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_PATCH_CONTROL_POINTS | RADV_DYNAMIC_TESS_DOMAIN_ORIGIN;
cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_PATCH_CONTROL_POINTS;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE;
/* Re-emit the VS prolog when the tessellation control shader is compiled separately because
* shader configs are combined and need to be updated.
@@ -11473,6 +11475,9 @@ radv_validate_dynamic_states(struct radv_cmd_buffer *cmd_buffer, uint64_t dynami
if (dynamic_states & (RADV_DYNAMIC_SCISSOR | RADV_DYNAMIC_VIEWPORT) && !pdev->info.has_gfx9_scissor_bug)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_SCISSOR_STATE;
if (dynamic_states & RADV_DYNAMIC_TESS_DOMAIN_ORIGIN)
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE;
}
static void
@@ -11580,6 +11585,9 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_SCISSOR_STATE)
radv_emit_scissor_state(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE)
radv_emit_tess_domain_origin_state(cmd_buffer);
if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RASTER_STATE)
radv_emit_raster_state(cmd_buffer);
src/amd/vulkan/radv_cmd_buffer.h
+2 -1
View File
@@ -115,7 +115,8 @@ enum radv_cmd_dirty_bits {
RADV_CMD_DIRTY_BLEND_CONSTANTS_STATE = 1ull << 29,
RADV_CMD_DIRTY_SAMPLE_LOCATIONS_STATE = 1ull << 30,
RADV_CMD_DIRTY_SCISSOR_STATE = 1ull << 31,
RADV_CMD_DIRTY_ALL = (1ull << 32) - 1,
RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE = 1ull << 32,
RADV_CMD_DIRTY_ALL = (1ull << 33) - 1,
RADV_CMD_DIRTY_SHADER_QUERY = RADV_CMD_DIRTY_NGG_STATE | RADV_CMD_DIRTY_TASK_STATE,
};