intel: Delete devinfo->has_surface_tile_offset

This is used in exactly one place in crocus, which already has a comment
indicating that this code is needed for original Gfx4 hardware.  Just
replace that with a verx10 == 40 check.

Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33764>

src/gallium/drivers/crocus/crocus_state.c

@@ -2907,8 +2907,7 @@ crocus_create_surface(struct pipe_context *ctx,
                                           res->base.b.target == PIPE_TEXTURE_3D ? 0 : tmpl->u.tex.first_layer,
                                           res->base.b.target == PIPE_TEXTURE_3D ? tmpl->u.tex.first_layer : 0,
                                           &temp_offset, &temp_x, &temp_y);
-      if (!devinfo->has_surface_tile_offset &&
-          (temp_x || temp_y)) {
+      if (devinfo->verx10 == 40 && (temp_x || temp_y)) {
          /* Original gfx4 hardware couldn't draw to a non-tile-aligned
           * destination.
           */

src/intel/dev/intel_device_info.c

@@ -132,7 +132,6 @@ static const struct intel_device_info intel_device_info_g4x = {
    .verx10 = 45,
    .has_pln = true,
    .has_compr4 = true,
-   .has_surface_tile_offset = true,
    .platform = INTEL_PLATFORM_G4X,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -154,7 +153,6 @@ static const struct intel_device_info intel_device_info_ilk = {
    .platform = INTEL_PLATFORM_ILK,
    .has_pln = true,
    .has_compr4 = true,
-   .has_surface_tile_offset = true,
    .num_slices = 1,
    .num_subslices = { 1, },
    .max_eus_per_subslice = 12,
@@ -177,7 +175,6 @@ static const struct intel_device_info intel_device_info_snb_gt1 = {
    .has_hiz_and_separate_stencil = true,
    .has_llc = true,
    .has_pln = true,
-   .has_surface_tile_offset = true,
    .needs_unlit_centroid_workaround = true,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -208,7 +205,6 @@ static const struct intel_device_info intel_device_info_snb_gt2 = {
    .has_hiz_and_separate_stencil = true,
    .has_llc = true,
    .has_pln = true,
-   .has_surface_tile_offset = true,
    .needs_unlit_centroid_workaround = true,
    .num_slices = 1,
    .num_subslices = { 1, },
@@ -238,7 +234,6 @@ static const struct intel_device_info intel_device_info_snb_gt2 = {
    .has_llc = true,                                 \
    .has_pln = true,                                 \
    .has_64bit_float = true,                         \
-   .has_surface_tile_offset = true,                 \
    .grf_size = 32,                                  \
    .timestamp_frequency = 12500000,                 \
    .max_constant_urb_size_kb = 16
@@ -433,7 +428,6 @@ static const struct intel_device_info intel_device_info_hsw_gt3 = {
    .has_64bit_float = true,                         \
    .has_64bit_int = true,                           \
    .supports_simd16_3src = true,                    \
-   .has_surface_tile_offset = true,                 \
    .num_thread_per_eu = 7,                          \
    .grf_size = 32,                                  \
    .max_vs_threads = 504,                           \

src/intel/dev/intel_device_info.py

@@ -279,7 +279,6 @@ Struct("intel_device_info",
         Member("bool", "has_64bit_int", compiler_field=True),
         Member("bool", "has_integer_dword_mul", compiler_field=True),
         Member("bool", "has_compr4", compiler_field=True),
-        Member("bool", "has_surface_tile_offset"),
         Member("bool", "supports_simd16_3src", compiler_field=True),
         Member("bool", "disable_ccs_repack"),