virgl: ARB_texture_barrier support

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
This commit is contained in:
Dave Airlie
2018-08-03 15:19:41 +10:00
parent 6d61aed231
commit 0be5e9f5a1
7 changed files with 25 additions and 4 deletions
+1 -1
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@@ -219,7 +219,7 @@ GL 4.5, GLSL 4.50 -- all DONE: nvc0, radeonsi
GL_ARB_direct_state_access DONE (all drivers)
GL_ARB_get_texture_sub_image DONE (all drivers)
GL_ARB_shader_texture_image_samples DONE (i965, nv50, r600, virgl)
GL_ARB_texture_barrier DONE (freedreno, i965, nv50, r600)
GL_ARB_texture_barrier DONE (freedreno, i965, nv50, r600, virgl)
GL_KHR_context_flush_control DONE (all - but needs GLX/EGL extension to be useful)
GL_KHR_robustness DONE (i965)
GL_EXT_shader_integer_mix DONE (all drivers that support GLSL)
+7 -2
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@@ -805,9 +805,14 @@ static void virgl_set_sampler_views(struct pipe_context *ctx,
}
static void
virgl_texture_barrier(struct pipe_context *pctx, unsigned flags)
virgl_texture_barrier(struct pipe_context *ctx, unsigned flags)
{
/* stub */
struct virgl_context *vctx = virgl_context(ctx);
struct virgl_screen *rs = virgl_screen(ctx->screen);
if (!(rs->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER))
return;
virgl_encode_texture_barrier(vctx, flags);
}
static void virgl_destroy_sampler_view(struct pipe_context *ctx,
+8
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@@ -1009,3 +1009,11 @@ int virgl_encode_launch_grid(struct virgl_context *ctx,
virgl_encoder_write_dword(ctx->cbuf, grid_info->indirect_offset);
return 0;
}
int virgl_encode_texture_barrier(struct virgl_context *ctx,
unsigned flags)
{
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_TEXTURE_BARRIER, 0, 1));
virgl_encoder_write_dword(ctx->cbuf, flags);
return 0;
}
+2
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@@ -272,4 +272,6 @@ int virgl_encode_memory_barrier(struct virgl_context *ctx,
unsigned flags);
int virgl_encode_launch_grid(struct virgl_context *ctx,
const struct pipe_grid_info *grid_info);
int virgl_encode_texture_barrier(struct virgl_context *ctx,
unsigned flags);
#endif
+1
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@@ -229,6 +229,7 @@ enum virgl_formats {
#define VIRGL_CAP_ROBUST_BUFFER_ACCESS (1 << 9)
#define VIRGL_CAP_TGSI_FBFETCH (1 << 10)
#define VIRGL_CAP_SHADER_CLOCK (1 << 11)
#define VIRGL_CAP_TEXTURE_BARRIER (1 << 12)
/* virgl bind flags - these are compatible with mesa 10.5 gallium.
* but are fixed, no other should be passed to virgl either.
@@ -91,6 +91,7 @@ enum virgl_context_cmd {
VIRGL_CCMD_MEMORY_BARRIER,
VIRGL_CCMD_LAUNCH_GRID,
VIRGL_CCMD_SET_FRAMEBUFFER_STATE_NO_ATTACH,
VIRGL_CCMD_TEXTURE_BARRIER,
};
/*
@@ -539,4 +540,8 @@ enum virgl_context_cmd {
#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_LAYERS(x) (x & 0xffff)
#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_SAMPLES(x) ((x >> 16) & 0xff)
/* texture barrier */
#define VIRGL_TEXTURE_BARRIER_SIZE 1
#define VIRGL_TEXTURE_BARRIER_FLAGS 1
#endif
+1 -1
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@@ -124,7 +124,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONDITIONAL_RENDER:
return vscreen->caps.caps.v1.bset.conditional_render;
case PIPE_CAP_TEXTURE_BARRIER:
return 0;
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
return 1;
case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: