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ilo: make ilo_render_emit_query() direct

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Remove emit_query() and ILO_RENDER_QUERY indirections.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
This commit is contained in:
Chia-I Wu
2014-09-25 12:10:00 +08:00
parent 18cbd3cc34
commit 0afc17ea49
6 changed files with 159 additions and 173 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/ilo/ilo_draw.c
+1 -2
View File
@@ -176,8 +176,7 @@ ilo_init_draw_query(struct ilo_context *ilo, struct ilo_query *q)
break;
}
q->cmd_len = ilo_render_estimate_size(ilo->render,
ILO_RENDER_QUERY, q);
q->cmd_len = ilo_render_get_query_len(ilo->render, q->type);
/* double cmd_len and stride if in pairs */
q->cmd_len <<= q->in_pairs;
src/gallium/drivers/ilo/ilo_render.c
+150
View File
@@ -29,7 +29,9 @@
#include "intel_winsys.h"
#include "ilo_builder.h"
#include "ilo_builder_mi.h"
#include "ilo_builder_render.h"
#include "ilo_query.h"
#include "ilo_render_gen.h"
#include "ilo_render_gen7.h"
#include "ilo_render.h"
@@ -224,3 +226,151 @@ ilo_render_emit_flush(struct ilo_render *render)
render->state.current_pipe_control_dw1 |= dw1;
render->state.deferred_pipe_control_dw1 &= ~dw1;
}
/**
* Return the command length of ilo_render_emit_query().
*/
int
ilo_render_get_query_len(const struct ilo_render *render,
unsigned query_type)
{
int len;
ILO_DEV_ASSERT(render->dev, 6, 7.5);
switch (query_type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
len = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
len *= 3;
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
len = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
len *= 2;
break;
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_PRIMITIVES_EMITTED:
len = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
len *= 3;
len += GEN6_MI_STORE_REGISTER_MEM__SIZE * 2;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
if (ilo_dev_gen(render->dev) >= ILO_GEN(7)) {
const int num_regs = 10;
const int num_pads = 1;
len = GEN6_PIPE_CONTROL__SIZE +
GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs +
GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
} else {
const int num_regs = 8;
const int num_pads = 3;
len = GEN6_PIPE_CONTROL__SIZE * 3 +
GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs +
GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
}
break;
default:
len = 0;
break;
}
return len;
}
/**
* Emit PIPE_CONTROLs or MI_STORE_REGISTER_MEMs to store register values.
*/
void
ilo_render_emit_query(struct ilo_render *render,
struct ilo_query *q, uint32_t offset)
{
const uint32_t pipeline_statistics_regs[11] = {
GEN6_REG_IA_VERTICES_COUNT,
GEN6_REG_IA_PRIMITIVES_COUNT,
GEN6_REG_VS_INVOCATION_COUNT,
GEN6_REG_GS_INVOCATION_COUNT,
GEN6_REG_GS_PRIMITIVES_COUNT,
GEN6_REG_CL_INVOCATION_COUNT,
GEN6_REG_CL_PRIMITIVES_COUNT,
GEN6_REG_PS_INVOCATION_COUNT,
(ilo_dev_gen(render->dev) >= ILO_GEN(7)) ?
GEN7_REG_HS_INVOCATION_COUNT : 0,
(ilo_dev_gen(render->dev) >= ILO_GEN(7)) ?
GEN7_REG_DS_INVOCATION_COUNT : 0,
0,
};
const uint32_t primitives_generated_reg =
(ilo_dev_gen(render->dev) >= ILO_GEN(7) && q->index > 0) ?
GEN7_REG_SO_PRIM_STORAGE_NEEDED(q->index) :
GEN6_REG_CL_INVOCATION_COUNT;
const uint32_t primitives_emitted_reg =
(ilo_dev_gen(render->dev) >= ILO_GEN(7)) ?
GEN7_REG_SO_NUM_PRIMS_WRITTEN(q->index) :
GEN6_REG_SO_NUM_PRIMS_WRITTEN;
const uint32_t *regs;
int reg_count = 0, i;
uint32_t pipe_control_dw1 = 0;
ILO_DEV_ASSERT(render->dev, 6, 7.5);
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
pipe_control_dw1 = GEN6_PIPE_CONTROL_DEPTH_STALL |
GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT;
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
pipe_control_dw1 = GEN6_PIPE_CONTROL_WRITE_TIMESTAMP;
break;
case PIPE_QUERY_PRIMITIVES_GENERATED:
regs = &primitives_generated_reg;
reg_count = 1;
break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
regs = &primitives_emitted_reg;
reg_count = 1;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
regs = pipeline_statistics_regs;
reg_count = Elements(pipeline_statistics_regs);
break;
default:
break;
}
if (pipe_control_dw1) {
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
gen6_wa_pre_pipe_control(render, pipe_control_dw1);
gen6_PIPE_CONTROL(render->builder, pipe_control_dw1,
q->bo, offset, true);
render->state.current_pipe_control_dw1 |= pipe_control_dw1;
render->state.deferred_pipe_control_dw1 &= ~pipe_control_dw1;
}
if (!reg_count)
return;
ilo_render_emit_flush(render);
for (i = 0; i < reg_count; i++) {
if (regs[i]) {
/* store lower 32 bits */
gen6_MI_STORE_REGISTER_MEM(render->builder, q->bo, offset, regs[i]);
/* store higher 32 bits */
gen6_MI_STORE_REGISTER_MEM(render->builder, q->bo,
offset + 4, regs[i] + 4);
} else {
gen6_MI_STORE_DATA_IMM(render->builder, q->bo, offset, 0, true);
}
offset += 8;
}
}
src/gallium/drivers/ilo/ilo_render.h
+8 -14
View File
@@ -39,7 +39,6 @@ struct ilo_state_vector;
enum ilo_render_action {
ILO_RENDER_DRAW,
ILO_RENDER_QUERY,
ILO_RENDER_RECTLIST,
};
@@ -63,9 +62,6 @@ struct ilo_render {
void (*emit_draw)(struct ilo_render *render,
const struct ilo_state_vector *vec);
void (*emit_query)(struct ilo_render *render,
struct ilo_query *q, uint32_t offset);
void (*emit_rectlist)(struct ilo_render *render,
const struct ilo_blitter *blitter);
@@ -169,16 +165,6 @@ ilo_render_emit_draw(struct ilo_render *render,
render->emit_draw(render, vec);
}
/**
* Emit PIPE_CONTROL or MI_STORE_REGISTER_MEM to save register values.
*/
static inline void
ilo_render_emit_query(struct ilo_render *render,
struct ilo_query *q, uint32_t offset)
{
render->emit_query(render, q, offset);
}
static inline void
ilo_render_emit_rectlist(struct ilo_render *render,
const struct ilo_blitter *blitter)
@@ -204,4 +190,12 @@ ilo_render_get_flush_len(const struct ilo_render *render);
void
ilo_render_emit_flush(struct ilo_render *render);
int
ilo_render_get_query_len(const struct ilo_render *render,
unsigned query_type);
void
ilo_render_emit_query(struct ilo_render *render,
struct ilo_query *q, uint32_t offset);
#endif /* ILO_RENDER_H */
src/gallium/drivers/ilo/ilo_render_gen.h
-8
View File
@@ -147,14 +147,6 @@ int
gen6_render_estimate_state_size(const struct ilo_render *render,
const struct ilo_state_vector *ilo);
int
gen6_render_estimate_query_size(const struct ilo_render *render,
const struct ilo_query *q);
void
ilo_render_emit_query_gen6(struct ilo_render *r,
struct ilo_query *q, uint32_t offset);
void
ilo_render_init_gen6(struct ilo_render *render);
src/gallium/drivers/ilo/ilo_render_gen6.c
-144
View File
@@ -1471,92 +1471,6 @@ ilo_render_emit_draw_gen6(struct ilo_render *render,
gen6_draw_end(render, vec, &session);
}
void
ilo_render_emit_query_gen6(struct ilo_render *r,
struct ilo_query *q, uint32_t offset)
{
const uint32_t pipeline_statistics_regs[] = {
GEN6_REG_IA_VERTICES_COUNT,
GEN6_REG_IA_PRIMITIVES_COUNT,
GEN6_REG_VS_INVOCATION_COUNT,
GEN6_REG_GS_INVOCATION_COUNT,
GEN6_REG_GS_PRIMITIVES_COUNT,
GEN6_REG_CL_INVOCATION_COUNT,
GEN6_REG_CL_PRIMITIVES_COUNT,
GEN6_REG_PS_INVOCATION_COUNT,
(ilo_dev_gen(r->dev) >= ILO_GEN(7)) ? GEN7_REG_HS_INVOCATION_COUNT : 0,
(ilo_dev_gen(r->dev) >= ILO_GEN(7)) ? GEN7_REG_DS_INVOCATION_COUNT : 0,
0,
};
const uint32_t primitives_generated_reg =
(ilo_dev_gen(r->dev) >= ILO_GEN(7) && q->index > 0) ?
GEN7_REG_SO_PRIM_STORAGE_NEEDED(q->index) :
GEN6_REG_CL_INVOCATION_COUNT;
const uint32_t primitives_emitted_reg =
(ilo_dev_gen(r->dev) >= ILO_GEN(7)) ?
GEN7_REG_SO_NUM_PRIMS_WRITTEN(q->index) :
GEN6_REG_SO_NUM_PRIMS_WRITTEN;
const uint32_t *regs;
int reg_count = 0, i;
uint32_t pipe_control_dw1 = 0;
ILO_DEV_ASSERT(r->dev, 6, 7.5);
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
pipe_control_dw1 = GEN6_PIPE_CONTROL_DEPTH_STALL |
GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT;
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
pipe_control_dw1 = GEN6_PIPE_CONTROL_WRITE_TIMESTAMP;
break;
case PIPE_QUERY_PRIMITIVES_GENERATED:
regs = &primitives_generated_reg;
reg_count = 1;
break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
regs = &primitives_emitted_reg;
reg_count = 1;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
regs = pipeline_statistics_regs;
reg_count = Elements(pipeline_statistics_regs);
break;
default:
break;
}
if (pipe_control_dw1) {
if (ilo_dev_gen(r->dev) == ILO_GEN(6))
gen6_wa_pre_pipe_control(r, pipe_control_dw1);
gen6_PIPE_CONTROL(r->builder, pipe_control_dw1, q->bo, offset, true);
r->state.current_pipe_control_dw1 |= pipe_control_dw1;
r->state.deferred_pipe_control_dw1 &= ~pipe_control_dw1;
}
if (!reg_count)
return;
ilo_render_emit_flush(r);
for (i = 0; i < reg_count; i++) {
if (regs[i]) {
/* store lower 32 bits */
gen6_MI_STORE_REGISTER_MEM(r->builder, q->bo, offset, regs[i]);
/* store higher 32 bits */
gen6_MI_STORE_REGISTER_MEM(r->builder, q->bo,
offset + 4, regs[i] + 4);
} else {
gen6_MI_STORE_DATA_IMM(r->builder, q->bo, offset, 0, true);
}
offset += 8;
}
}
static void
gen6_rectlist_vs_to_sf(struct ilo_render *r,
const struct ilo_blitter *blitter,
@@ -1883,59 +1797,6 @@ gen6_render_estimate_state_size(const struct ilo_render *render,
return size;
}
int
gen6_render_estimate_query_size(const struct ilo_render *render,
const struct ilo_query *q)
{
int size;
ILO_DEV_ASSERT(render->dev, 6, 7.5);
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
size = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
size *= 3;
break;
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
size = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
size *= 2;
break;
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_PRIMITIVES_EMITTED:
size = GEN6_PIPE_CONTROL__SIZE;
if (ilo_dev_gen(render->dev) == ILO_GEN(6))
size *= 3;
size += GEN6_MI_STORE_REGISTER_MEM__SIZE * 2;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
if (ilo_dev_gen(render->dev) >= ILO_GEN(7)) {
const int num_regs = 10;
const int num_pads = 1;
size = GEN6_PIPE_CONTROL__SIZE +
GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs +
GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
} else {
const int num_regs = 8;
const int num_pads = 3;
size = GEN6_PIPE_CONTROL__SIZE * 3 +
GEN6_MI_STORE_REGISTER_MEM__SIZE * 2 * num_regs +
GEN6_MI_STORE_DATA_IMM__SIZE * num_pads;
}
break;
default:
size = 0;
break;
}
return size;
}
static int
ilo_render_estimate_size_gen6(struct ilo_render *render,
enum ilo_render_action action,
@@ -1952,10 +1813,6 @@ ilo_render_estimate_size_gen6(struct ilo_render *render,
gen6_render_estimate_state_size(render, ilo);
}
break;
case ILO_RENDER_QUERY:
size = gen6_render_estimate_query_size(render,
(const struct ilo_query *) arg);
break;
case ILO_RENDER_RECTLIST:
size = 64 + 256; /* states + commands */
break;
@@ -1973,6 +1830,5 @@ ilo_render_init_gen6(struct ilo_render *render)
{
render->estimate_size = ilo_render_estimate_size_gen6;
render->emit_draw = ilo_render_emit_draw_gen6;
render->emit_query = ilo_render_emit_query_gen6;
render->emit_rectlist = ilo_render_emit_rectlist_gen6;
}
src/gallium/drivers/ilo/ilo_render_gen7.c
-5
View File
@@ -991,10 +991,6 @@ ilo_render_estimate_size_gen7(struct ilo_render *render,
gen6_render_estimate_state_size(render, ilo);
}
break;
case ILO_RENDER_QUERY:
size = gen6_render_estimate_query_size(render,
(const struct ilo_query *) arg);
break;
case ILO_RENDER_RECTLIST:
size = 64 + 256; /* states + commands */
break;
@@ -1012,6 +1008,5 @@ ilo_render_init_gen7(struct ilo_render *render)
{
render->estimate_size = ilo_render_estimate_size_gen7;
render->emit_draw = ilo_render_emit_draw_gen7;
render->emit_query = ilo_render_emit_query_gen6;
render->emit_rectlist = ilo_render_emit_rectlist_gen7;
}