i965: Drop i915 register/instruction definitions.
v2: Remove unused DV_PF_* macros, too. (change by Ken) Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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committed by
Kenneth Graunke
parent
1b67cd29a1
commit
0ac0a1b02e
@@ -57,12 +57,6 @@ extern "C" {
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#include "tnl_dd/t_dd_vertex.h"
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#undef TAG
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#define DV_PF_555 (1<<8)
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#define DV_PF_565 (2<<8)
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#define DV_PF_8888 (3<<8)
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#define DV_PF_4444 (8<<8)
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#define DV_PF_1555 (9<<8)
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struct intel_region;
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struct intel_context;
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@@ -41,20 +41,9 @@
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#define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2)
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/* Stalls command execution waiting for the given events to have occurred. */
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#define MI_WAIT_FOR_EVENT (CMD_MI | (0x3 << 23))
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#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6)
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#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
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#define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23))
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# define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22)
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/* p189 */
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#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16))
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#define I1_LOAD_S(n) (1<<(4+n))
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#define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
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/** @{
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*
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* PIPE_CONTROL operation, a combination MI_FLUSH and register write with
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@@ -87,161 +76,6 @@
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/** @} */
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/** @{
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* 915 definitions
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*
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* 915 documents say that bits 31:28 and 1 are "undefined, must be zero."
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*/
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#define S0_VB_OFFSET_MASK 0x0ffffffc
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#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
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/** @} */
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/** @{
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* 830 definitions
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*/
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#define S0_VB_OFFSET_MASK_830 0xffffff80
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#define S0_VB_PITCH_SHIFT_830 1
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#define S0_VB_ENABLE_830 (1<<0)
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/** @} */
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#define S1_VERTEX_WIDTH_SHIFT 24
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#define S1_VERTEX_WIDTH_MASK (0x3f<<24)
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#define S1_VERTEX_PITCH_SHIFT 16
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#define S1_VERTEX_PITCH_MASK (0x3f<<16)
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#define TEXCOORDFMT_2D 0x0
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#define TEXCOORDFMT_3D 0x1
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#define TEXCOORDFMT_4D 0x2
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#define TEXCOORDFMT_1D 0x3
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#define TEXCOORDFMT_2D_16 0x4
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#define TEXCOORDFMT_4D_16 0x5
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#define TEXCOORDFMT_NOT_PRESENT 0xf
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#define S2_TEXCOORD_FMT0_MASK 0xf
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#define S2_TEXCOORD_FMT1_SHIFT 4
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#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4))
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#define S2_TEXCOORD_NONE (~0)
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#define S2_TEX_COUNT_SHIFT_830 12
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#define S2_VERTEX_1_WIDTH_SHIFT_830 0
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#define S2_VERTEX_0_WIDTH_SHIFT_830 6
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/* S3 not interesting */
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#define S4_POINT_WIDTH_SHIFT 23
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#define S4_POINT_WIDTH_MASK (0x1ff<<23)
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#define S4_LINE_WIDTH_SHIFT 19
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#define S4_LINE_WIDTH_ONE (0x2<<19)
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#define S4_LINE_WIDTH_MASK (0xf<<19)
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#define S4_FLATSHADE_ALPHA (1<<18)
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#define S4_FLATSHADE_FOG (1<<17)
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#define S4_FLATSHADE_SPECULAR (1<<16)
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#define S4_FLATSHADE_COLOR (1<<15)
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#define S4_CULLMODE_BOTH (0<<13)
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#define S4_CULLMODE_NONE (1<<13)
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#define S4_CULLMODE_CW (2<<13)
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#define S4_CULLMODE_CCW (3<<13)
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#define S4_CULLMODE_MASK (3<<13)
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#define S4_VFMT_POINT_WIDTH (1<<12)
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#define S4_VFMT_SPEC_FOG (1<<11)
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#define S4_VFMT_COLOR (1<<10)
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#define S4_VFMT_DEPTH_OFFSET (1<<9)
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#define S4_VFMT_XYZ (1<<6)
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#define S4_VFMT_XYZW (2<<6)
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#define S4_VFMT_XY (3<<6)
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#define S4_VFMT_XYW (4<<6)
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#define S4_VFMT_XYZW_MASK (7<<6)
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#define S4_FORCE_DEFAULT_DIFFUSE (1<<5)
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#define S4_FORCE_DEFAULT_SPECULAR (1<<4)
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#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3)
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#define S4_VFMT_FOG_PARAM (1<<2)
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#define S4_SPRITE_POINT_ENABLE (1<<1)
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#define S4_LINE_ANTIALIAS_ENABLE (1<<0)
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#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \
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S4_VFMT_SPEC_FOG | \
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S4_VFMT_COLOR | \
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S4_VFMT_DEPTH_OFFSET | \
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S4_VFMT_XYZW_MASK | \
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S4_VFMT_FOG_PARAM)
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#define S5_WRITEDISABLE_ALPHA (1<<31)
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#define S5_WRITEDISABLE_RED (1<<30)
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#define S5_WRITEDISABLE_GREEN (1<<29)
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#define S5_WRITEDISABLE_BLUE (1<<28)
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#define S5_WRITEDISABLE_MASK (0xf<<28)
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#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27)
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#define S5_LAST_PIXEL_ENABLE (1<<26)
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#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25)
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#define S5_FOG_ENABLE (1<<24)
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#define S5_STENCIL_REF_SHIFT 16
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#define S5_STENCIL_REF_MASK (0xff<<16)
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#define S5_STENCIL_TEST_FUNC_SHIFT 13
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#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13)
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#define S5_STENCIL_FAIL_SHIFT 10
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#define S5_STENCIL_FAIL_MASK (0x7<<10)
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#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7
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#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7)
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#define S5_STENCIL_PASS_Z_PASS_SHIFT 4
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#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4)
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#define S5_STENCIL_WRITE_ENABLE (1<<3)
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#define S5_STENCIL_TEST_ENABLE (1<<2)
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#define S5_COLOR_DITHER_ENABLE (1<<1)
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#define S5_LOGICOP_ENABLE (1<<0)
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#define S6_ALPHA_TEST_ENABLE (1<<31)
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#define S6_ALPHA_TEST_FUNC_SHIFT 28
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#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28)
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#define S6_ALPHA_REF_SHIFT 20
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#define S6_ALPHA_REF_MASK (0xff<<20)
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#define S6_DEPTH_TEST_ENABLE (1<<19)
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#define S6_DEPTH_TEST_FUNC_SHIFT 16
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#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16)
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#define S6_CBUF_BLEND_ENABLE (1<<15)
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#define S6_CBUF_BLEND_FUNC_SHIFT 12
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#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12)
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#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8
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#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8)
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#define S6_CBUF_DST_BLEND_FACT_SHIFT 4
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#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4)
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#define S6_DEPTH_WRITE_ENABLE (1<<3)
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#define S6_COLOR_WRITE_ENABLE (1<<2)
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#define S6_TRISTRIP_PV_SHIFT 0
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#define S6_TRISTRIP_PV_MASK (0x3<<0)
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#define S7_DEPTH_OFFSET_CONST_MASK ~0
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/* p143 */
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#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
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/* Dword 1 */
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#define BUF_3D_ID_COLOR_BACK (0x3<<24)
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#define BUF_3D_ID_DEPTH (0x7<<24)
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#define BUF_3D_USE_FENCE (1<<23)
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#define BUF_3D_TILED_SURFACE (1<<22)
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#define BUF_3D_TILE_WALK_X 0
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#define BUF_3D_TILE_WALK_Y (1<<21)
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#define BUF_3D_PITCH(x) (((x)/4)<<2)
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/* Dword 2 */
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#define BUF_3D_ADDR(x) ((x) & ~0x3)
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/* Primitive dispatch on 830-945 */
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#define _3DPRIMITIVE (CMD_3D | (0x1f << 24))
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#define PRIM_INDIRECT (1<<23)
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#define PRIM_INLINE (0<<23)
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#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
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#define PRIM_INDIRECT_ELTS (1<<17)
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#define PRIM3D_TRILIST (0x0<<18)
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#define PRIM3D_TRISTRIP (0x1<<18)
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#define PRIM3D_TRISTRIP_RVRSE (0x2<<18)
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#define PRIM3D_TRIFAN (0x3<<18)
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#define PRIM3D_POLY (0x4<<18)
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#define PRIM3D_LINELIST (0x5<<18)
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#define PRIM3D_LINESTRIP (0x6<<18)
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#define PRIM3D_RECTLIST (0x7<<18)
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#define PRIM3D_POINTLIST (0x8<<18)
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#define PRIM3D_DIB (0x9<<18)
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#define PRIM3D_MASK (0x1f<<18)
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#define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22))
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#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22))
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@@ -262,10 +96,6 @@
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#define BR13_565 (0x1 << 24)
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#define BR13_8888 (0x3 << 24)
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#define FENCE_LINEAR 0
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#define FENCE_XMAJOR 1
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#define FENCE_YMAJOR 2
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/* Pipeline Statistics Counter Registers */
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#define IA_VERTICES_COUNT 0x2310
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#define IA_PRIMITIVES_COUNT 0x2318
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