i965/vec4: Add support for the MAC instruction.
This allows us to generate the MAC (multiply-accumulate) instruction, which can be used to implement some expressions in fewer instructions than doing a series of MUL and ADDs. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
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Matt Turner
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306ed81b93
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0974706671
@@ -183,6 +183,7 @@ ALU1(FBL)
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ALU1(CBIT)
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ALU2(ADDC)
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ALU2(SUBB)
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ALU2(MAC)
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ROUND(RNDZ)
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ROUND(RNDE)
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@@ -1081,6 +1081,9 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
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assert(brw->gen >= 7);
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brw_SUBB(p, dst, src[0], src[1]);
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break;
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case BRW_OPCODE_MAC:
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brw_MAC(p, dst, src[0], src[1]);
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break;
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case BRW_OPCODE_BFE:
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assert(brw->gen >= 7);
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@@ -175,6 +175,7 @@ ALU1(CBIT)
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ALU3(MAD)
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ALU2_ACC(ADDC)
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ALU2_ACC(SUBB)
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ALU2(MAC)
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/** Gen4 predicated IF. */
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vec4_instruction *
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