st/mesa: increase size of gl_register_file bitfields

Bump up the size of the bitfields for gl_register_file type for MSVC.
Also add ASSERT_BITFIELD_SIZE check where this bitfield is used.

Fixes spec@arb_shader_atomic_counter_ops tests in MSVC.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6417>
This commit is contained in:
Charmaine Lee
2020-08-20 17:11:22 -07:00
committed by Marge Bot
parent e5899c1e88
commit 090239ea6b
2 changed files with 4 additions and 2 deletions

View File

@@ -6622,7 +6622,9 @@ st_translate_program(
assert(numOutputs <= ARRAY_SIZE(t->outputs));
ASSERT_BITFIELD_SIZE(st_src_reg, type, GLSL_TYPE_ERROR);
ASSERT_BITFIELD_SIZE(st_src_reg, file, PROGRAM_FILE_MAX);
ASSERT_BITFIELD_SIZE(st_dst_reg, type, GLSL_TYPE_ERROR);
ASSERT_BITFIELD_SIZE(st_dst_reg, file, PROGRAM_FILE_MAX);
ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, tex_type, GLSL_TYPE_ERROR);
ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, image_format, PIPE_FORMAT_COUNT);
ASSERT_BITFIELD_SIZE(glsl_to_tgsi_instruction, tex_target,

View File

@@ -65,7 +65,7 @@ public:
unsigned abs:1;
enum glsl_base_type type:6; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
unsigned has_index2:1;
gl_register_file file:5; /**< PROGRAM_* from Mesa */
gl_register_file file:6; /**< PROGRAM_* from Mesa */
/*
* Is this the second half of a double register pair?
* currently used for input mapping only.
@@ -105,7 +105,7 @@ public:
int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
int16_t index2D;
gl_register_file file:5; /**< PROGRAM_* from Mesa */
gl_register_file file:6; /**< PROGRAM_* from Mesa */
unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */
enum glsl_base_type type:6; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
unsigned has_index2:1;