r600/llvm: Fix isampleBuffer on preEG
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@@ -415,9 +415,22 @@ static void llvm_emit_tex(
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case TGSI_OPCODE_TXQ: {
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struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base);
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ctx->uses_tex_buffers = true;
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LLVMValueRef offset = lp_build_const_int32(bld_base->base.gallivm, 0);
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bool isEgPlus = (ctx->chip_class >= EVERGREEN);
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LLVMValueRef offset = lp_build_const_int32(bld_base->base.gallivm,
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isEgPlus ? 0 : 1);
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LLVMValueRef cvecval = llvm_load_const_buffer(bld_base, offset,
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LLVM_R600_BUFFER_INFO_CONST_BUFFER);
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if (!isEgPlus) {
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LLVMValueRef maskval[4] = {
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lp_build_const_int32(gallivm, 1),
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lp_build_const_int32(gallivm, 2),
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lp_build_const_int32(gallivm, 3),
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lp_build_const_int32(gallivm, 0),
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};
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LLVMValueRef mask = LLVMConstVector(maskval, 4);
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cvecval = LLVMBuildShuffleVector(gallivm->builder, cvecval, cvecval,
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mask, "");
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}
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emit_data->output[0] = cvecval;
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return;
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}
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