asahi: Skip LOD bias lowering for GLES
This reduces silliness in Dolphin ubershaders by eliminating the double lowering. It also makes the GLES shader assembly nicer to read. Dolphin ubershader performance at 4K on MMG improved by about 0.5%. Not massive, but definitely noticeable and reduces the delta to macOS. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25052>
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2adb0f31fc
commit
07cb81f0fc
@@ -1527,6 +1527,8 @@ agx_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
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/* By default all samples are enabled */
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ctx->sample_mask = ~0;
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ctx->support_lod_bias = !(flags & PIPE_CONTEXT_NO_LOD_BIAS);
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return pctx;
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}
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@@ -1718,7 +1718,7 @@ agx_get_shader_variant(struct agx_screen *screen,
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static void
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agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
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nir_shader *nir)
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nir_shader *nir, bool support_lod_bias)
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{
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if (nir->info.stage == MESA_SHADER_KERNEL)
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nir->info.stage = MESA_SHADER_COMPUTE;
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@@ -1756,7 +1756,7 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
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}
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bool allow_mediump = !(dev->debug & AGX_DBG_NO16);
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agx_preprocess_nir(nir, true, allow_mediump, &so->info);
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agx_preprocess_nir(nir, support_lod_bias, allow_mediump, &so->info);
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blob_init(&so->serialized_nir);
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nir_serialize(&so->serialized_nir, nir, true);
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@@ -1770,6 +1770,7 @@ static void *
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agx_create_shader_state(struct pipe_context *pctx,
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const struct pipe_shader_state *cso)
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{
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struct agx_context *ctx = agx_context(pctx);
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struct agx_uncompiled_shader *so =
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rzalloc(NULL, struct agx_uncompiled_shader);
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struct agx_device *dev = agx_device(pctx->screen);
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@@ -1791,7 +1792,7 @@ agx_create_shader_state(struct pipe_context *pctx,
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asahi_fs_shader_key_equal);
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}
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agx_shader_initialize(dev, so, nir);
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agx_shader_initialize(dev, so, nir, ctx->support_lod_bias);
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/* We're done with the NIR, throw it away */
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ralloc_free(nir);
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@@ -1847,6 +1848,7 @@ static void *
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agx_create_compute_state(struct pipe_context *pctx,
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const struct pipe_compute_state *cso)
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{
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struct agx_context *ctx = agx_context(pctx);
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struct agx_device *dev = agx_device(pctx->screen);
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struct agx_uncompiled_shader *so =
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rzalloc(NULL, struct agx_uncompiled_shader);
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@@ -1862,7 +1864,7 @@ agx_create_compute_state(struct pipe_context *pctx,
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assert(cso->ir_type == PIPE_SHADER_IR_NIR && "TGSI kernels unsupported");
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nir_shader *nir = (void *)cso->prog;
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agx_shader_initialize(dev, so, nir);
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agx_shader_initialize(dev, so, nir, ctx->support_lod_bias);
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agx_get_shader_variant(agx_screen(pctx->screen), so, &pctx->debug, &key);
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/* We're done with the NIR, throw it away */
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@@ -393,6 +393,9 @@ struct agx_context {
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struct agx_compiled_shader *vs, *fs;
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uint32_t dirty;
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/* Acts as a context-level shader key */
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bool support_lod_bias;
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/* Set of batches. When full, the LRU entry (the batch with the smallest
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* seqnum) is flushed to free a slot.
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*/
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