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nvk: Properly implement robustBufferAccess

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
This commit is contained in:
Faith Ekstrand
2023-01-30 20:11:59 -06:00
committed by Marge Bot
parent acf067d635
commit 07530902b2
5 changed files with 69 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/nouveau/vulkan/nvk_compute_pipeline.c
+13 -6
View File
@@ -2,11 +2,13 @@
#include "nvk_device.h"
#include "nvk_pipeline.h"
#include "nvk_shader.h"
#include "nouveau_bo.h"
#include "vk_nir.h"
#include "vk_pipeline.h"
#include "nouveau_bo.h"
#include "compiler/spirv/nir_spirv.h"
#include "drf.h"
#include "cla0c0qmd.h"
#include "clc0c0qmd.h"
@@ -81,20 +83,25 @@ nvk_compute_pipeline_create(struct nvk_device *device,
assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT);
struct vk_pipeline_robustness_state robustness;
vk_pipeline_robustness_state_fill(&device->vk, &robustness,
pCreateInfo->pNext,
pCreateInfo->stage.pNext);
const nir_shader_compiler_options *nir_options =
nvk_physical_device_nir_options(pdevice, MESA_SHADER_COMPUTE);
const struct spirv_to_nir_options *spirv_options =
nvk_physical_device_spirv_options(pdevice);
const struct spirv_to_nir_options spirv_options =
nvk_physical_device_spirv_options(pdevice, &robustness);
nir_shader *nir;
result = vk_pipeline_shader_stage_to_nir(&device->vk,
&pCreateInfo->stage,
spirv_options, nir_options,
&spirv_options, nir_options,
NULL, &nir);
if (result != VK_SUCCESS)
goto fail;
nvk_lower_nir(device, nir, pipeline_layout);
nvk_lower_nir(device, nir, &robustness, pipeline_layout);
result = nvk_compile_nir(pdevice, nir, &pipeline->base.shaders[MESA_SHADER_COMPUTE]);
ralloc_free(nir);
src/nouveau/vulkan/nvk_graphics_pipeline.c
+10 -4
View File
@@ -8,6 +8,8 @@
#include "nouveau_context.h"
#include "compiler/spirv/nir_spirv.h"
#include "nvk_cl9097.h"
#include "nvk_clb197.h"
#include "nvk_clc397.h"
@@ -214,19 +216,23 @@ nvk_graphics_pipeline_create(struct nvk_device *device,
const VkPipelineShaderStageCreateInfo *sinfo = &pCreateInfo->pStages[i];
gl_shader_stage stage = vk_to_mesa_shader_stage(sinfo->stage);
struct vk_pipeline_robustness_state robustness;
vk_pipeline_robustness_state_fill(&device->vk, &robustness,
pCreateInfo->pNext, sinfo->pNext);
const nir_shader_compiler_options *nir_options =
nvk_physical_device_nir_options(pdevice, stage);
const struct spirv_to_nir_options *spirv_options =
nvk_physical_device_spirv_options(pdevice);
const struct spirv_to_nir_options spirv_options =
nvk_physical_device_spirv_options(pdevice, &robustness);
nir_shader *nir;
result = vk_pipeline_shader_stage_to_nir(&device->vk, sinfo,
spirv_options, nir_options,
&spirv_options, nir_options,
NULL, &nir);
if (result != VK_SUCCESS)
goto fail;
nvk_lower_nir(device, nir, pipeline_layout);
nvk_lower_nir(device, nir, &robustness, pipeline_layout);
result = nvk_compile_nir(pdevice, nir, &pipeline->base.shaders[stage]);
ralloc_free(nir);
src/nouveau/vulkan/nvk_nir_lower_descriptors.c
+9 -7
View File
@@ -2,6 +2,7 @@
#include "nvk_descriptor_set.h"
#include "nvk_descriptor_set_layout.h"
#include "nvk_shader.h"
#include "vk_pipeline.h"
#include "nir_builder.h"
#include "nir_deref.h"
@@ -304,17 +305,18 @@ lower_descriptors_instr(nir_builder *b, nir_instr *instr,
bool
nvk_nir_lower_descriptors(nir_shader *nir,
const struct vk_pipeline_layout *layout,
bool robust_buffer_access)
const struct vk_pipeline_robustness_state *rs,
const struct vk_pipeline_layout *layout)
{
struct lower_descriptors_ctx ctx = {
.layout = layout,
.clamp_desc_array_bounds = robust_buffer_access,
.clamp_desc_array_bounds =
rs->storage_buffers != VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DISABLED_EXT ||
rs->uniform_buffers != VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DISABLED_EXT ||
rs->images != VK_PIPELINE_ROBUSTNESS_IMAGE_BEHAVIOR_DISABLED_EXT,
.desc_addr_format = nir_address_format_32bit_index_offset,
.ubo_addr_format = nir_address_format_32bit_index_offset,
.ssbo_addr_format = robust_buffer_access ?
nir_address_format_64bit_bounded_global :
nir_address_format_64bit_global_32bit_offset,
.ssbo_addr_format = nvk_buffer_addr_format(rs->storage_buffers),
.ubo_addr_format = nvk_buffer_addr_format(rs->uniform_buffers),
};
return nir_shader_instructions_pass(nir, lower_descriptors_instr,
nir_metadata_block_index |
src/nouveau/vulkan/nvk_shader.c
+16 -15
View File
@@ -5,6 +5,7 @@
#include "nouveau_bo.h"
#include "nouveau_context.h"
#include "vk_pipeline.h"
#include "vk_shader_module.h"
#include "nir.h"
@@ -53,19 +54,18 @@ nvk_physical_device_nir_options(const struct nvk_physical_device *pdevice,
return nv50_ir_nir_shader_compiler_options(pdevice->dev->chipset, p_stage);
}
static const struct spirv_to_nir_options spirv_options = {
.caps = {
.image_write_without_format = true,
},
.ssbo_addr_format = nir_address_format_64bit_global_32bit_offset,
.ubo_addr_format = nir_address_format_64bit_global_32bit_offset,
.shared_addr_format = nir_address_format_32bit_offset,
};
const struct spirv_to_nir_options *
nvk_physical_device_spirv_options(const struct nvk_physical_device *pdevice)
struct spirv_to_nir_options
nvk_physical_device_spirv_options(const struct nvk_physical_device *pdevice,
const struct vk_pipeline_robustness_state *rs)
{
return &spirv_options;
return (struct spirv_to_nir_options) {
.caps = {
.image_write_without_format = true,
},
.ssbo_addr_format = nvk_buffer_addr_format(rs->storage_buffers),
.ubo_addr_format = nvk_buffer_addr_format(rs->uniform_buffers),
.shared_addr_format = nir_address_format_32bit_offset,
};
}
static bool
@@ -181,6 +181,7 @@ assign_io_locations(nir_shader *nir)
void
nvk_lower_nir(struct nvk_device *device, nir_shader *nir,
const struct vk_pipeline_robustness_state *rs,
const struct vk_pipeline_layout *layout)
{
NIR_PASS(_, nir, nir_split_struct_vars, nir_var_function_temp);
@@ -217,11 +218,11 @@ nvk_lower_nir(struct nvk_device *device, nir_shader *nir,
NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_push_const,
nir_address_format_32bit_offset);
NIR_PASS(_, nir, nvk_nir_lower_descriptors, layout, true);
NIR_PASS(_, nir, nvk_nir_lower_descriptors, rs, layout);
NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ssbo,
spirv_options.ssbo_addr_format);
nvk_buffer_addr_format(rs->storage_buffers));
NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ubo,
spirv_options.ubo_addr_format);
nvk_buffer_addr_format(rs->uniform_buffers));
NIR_PASS(_, nir, nir_shader_instructions_pass,
lower_load_global_constant_offset_instr,
nir_metadata_block_index | nir_metadata_dominance, NULL);
src/nouveau/vulkan/nvk_shader.h
+21 -4
View File
@@ -8,6 +8,7 @@
#include "nouveau_bo.h"
struct vk_shader_module;
struct vk_pipeline_robustness_state;
struct nvk_device;
struct nvk_physical_device;
@@ -69,16 +70,32 @@ const nir_shader_compiler_options *
nvk_physical_device_nir_options(const struct nvk_physical_device *pdevice,
gl_shader_stage stage);
const struct spirv_to_nir_options *
nvk_physical_device_spirv_options(const struct nvk_physical_device *pdevice);
static inline nir_address_format
nvk_buffer_addr_format(VkPipelineRobustnessBufferBehaviorEXT robustness)
{
switch (robustness) {
case VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_DISABLED_EXT:
return nir_address_format_64bit_global_32bit_offset;
case VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_ROBUST_BUFFER_ACCESS_EXT:
case VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_ROBUST_BUFFER_ACCESS_2_EXT:
return nir_address_format_64bit_bounded_global;
default:
unreachable("Invalid robust buffer access behavior");
}
}
struct spirv_to_nir_options
nvk_physical_device_spirv_options(const struct nvk_physical_device *pdevice,
const struct vk_pipeline_robustness_state *rs);
bool
nvk_nir_lower_descriptors(nir_shader *nir,
const struct vk_pipeline_layout *layout,
bool robust_buffer_access);
const struct vk_pipeline_robustness_state *rs,
const struct vk_pipeline_layout *layout);
void
nvk_lower_nir(struct nvk_device *device, nir_shader *nir,
const struct vk_pipeline_robustness_state *rs,
const struct vk_pipeline_layout *layout);
VkResult