new X86 CPU detection code (Petr Sebor)
This commit is contained in:
Brian Paul
@@ -1,4 +1,4 @@
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/* $Id: common_x86.c,v 1.20 2002/11/13 15:03:31 brianp Exp $ */
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/* $Id: common_x86.c,v 1.21 2003/01/21 16:13:55 brianp Exp $ */
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/*
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* Mesa 3-D graphics library
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@@ -52,8 +52,14 @@ int _mesa_x86_cpu_features = 0;
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/* No reason for this to be public.
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*/
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extern int _mesa_identify_x86_cpu_features( void );
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extern int _mesa_identify_x86_cpu_features(void);
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extern GLuint _mesa_x86_has_cpuid(void);
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extern void _mesa_x86_cpuid(GLuint op, GLuint *reg_eax, GLuint *reg_ebx, GLuint *reg_ecx, GLuint *reg_edx);
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extern GLuint _mesa_x86_cpuid_eax(GLuint op);
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extern GLuint _mesa_x86_cpuid_ebx(GLuint op);
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extern GLuint _mesa_x86_cpuid_ecx(GLuint op);
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extern GLuint _mesa_x86_cpuid_edx(GLuint op);
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static void message( const char *msg )
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{
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@@ -240,8 +246,84 @@ void _mesa_init_all_x86_transform_asm( void )
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{
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(void) message; /* silence warning */
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#ifdef USE_X86_ASM
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_mesa_x86_cpu_features = _mesa_identify_x86_cpu_features();
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_mesa_x86_cpu_features = 0;
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if (!_mesa_x86_has_cpuid()) {
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message("CPUID not detected");
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}
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else {
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GLuint cpu_features;
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GLuint cpu_ext_features;
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GLuint cpu_ext_info;
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char cpu_vendor[13];
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GLuint result;
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/* get vendor name */
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_mesa_x86_cpuid(0, &result, (GLuint *)(cpu_vendor + 0), (GLuint *)(cpu_vendor + 8), (GLuint *)(cpu_vendor + 4));
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cpu_vendor[12] = '\0';
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message("cpu vendor: ");
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message(cpu_vendor);
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message("\n");
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/* get cpu features */
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cpu_features = _mesa_x86_cpuid_edx(1);
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if (cpu_features & X86_CPU_FPU)
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_mesa_x86_cpu_features |= X86_FEATURE_FPU;
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if (cpu_features & X86_CPU_CMOV)
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_mesa_x86_cpu_features |= X86_FEATURE_CMOV;
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#ifdef USE_MMX_ASM
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if (cpu_features & X86_CPU_MMX)
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_mesa_x86_cpu_features |= X86_FEATURE_MMX;
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#endif
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#ifdef USE_SSE_ASM
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if (cpu_features & X86_CPU_XMM)
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_mesa_x86_cpu_features |= X86_FEATURE_XMM;
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if (cpu_features & X86_CPU_XMM2)
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_mesa_x86_cpu_features |= X86_FEATURE_XMM2;
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#endif
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/* query extended cpu features */
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if ((cpu_ext_info = _mesa_x86_cpuid_eax(0x80000000)) > 0x80000000) {
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if (cpu_ext_info >= 0x80000001) {
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cpu_ext_features = _mesa_x86_cpuid_edx(0x80000001);
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if (cpu_features & X86_CPU_MMX) {
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#ifdef USE_3DNOW_ASM
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if (cpu_ext_features & X86_CPUEXT_3DNOW)
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_mesa_x86_cpu_features |= X86_FEATURE_3DNOW;
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if (cpu_ext_features & X86_CPUEXT_3DNOW_EXT)
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_mesa_x86_cpu_features |= X86_FEATURE_3DNOWEXT;
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#endif
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#ifdef USE_MMX_ASM
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if (cpu_ext_features & X86_CPUEXT_MMX_EXT)
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_mesa_x86_cpu_features |= X86_FEATURE_MMXEXT;
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#endif
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}
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}
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/* query cpu name */
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if (cpu_ext_info >= 0x80000002) {
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GLuint ofs;
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char cpu_name[49];
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for (ofs = 0; ofs < 3; ofs++)
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_mesa_x86_cpuid(0x80000002+ofs, (GLuint *)(cpu_name + (16*ofs)+0), (GLuint *)(cpu_name + (16*ofs)+4), (GLuint *)(cpu_name + (16*ofs)+8), (GLuint *)(cpu_name + (16*ofs)+12));
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cpu_name[48] = '\0'; /* the name should be NULL terminated, but just to be sure */
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message("cpu name: ");
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message(cpu_name);
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message("\n");
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}
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}
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}
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if ( getenv( "MESA_NO_ASM" ) ) {
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_mesa_x86_cpu_features = 0;
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}
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+89
-123
@@ -1,4 +1,4 @@
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/* $Id: common_x86_asm.S,v 1.16 2003/01/09 23:43:02 brianp Exp $ */
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/* $Id: common_x86_asm.S,v 1.17 2003/01/21 16:13:58 brianp Exp $ */
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/*
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* Mesa 3-D graphics library
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@@ -32,6 +32,7 @@
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* Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
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*
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* Cleaned up and simplified by Gareth Hughes <gareth@valinux.com>
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*
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*/
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/*
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@@ -43,141 +44,105 @@
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#include "matypes.h"
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#include "common_x86_features.h"
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/* Intel vendor string
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*/
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#define GENU 0x756e6547 /* "Genu" */
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#define INEI 0x49656e69 /* "ineI" */
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#define NTEL 0x6c65746e /* "ntel" */
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/* AMD vendor string
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*/
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#define AUTH 0x68747541 /* "Auth" */
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#define ENTI 0x69746e65 /* "enti" */
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#define CAMD 0x444d4163 /* "cAMD" */
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SEG_DATA
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/* We might want to print out some useful messages.
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*/
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GLNAME( found_intel ): STRING( "Genuine Intel processor found\n\0" )
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GLNAME( found_amd ): STRING( "Authentic AMD processor found\n\0" )
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SEG_TEXT
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ALIGNTEXT4
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GLOBL GLNAME( _mesa_identify_x86_cpu_features )
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GLNAME( _mesa_identify_x86_cpu_features ):
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PUSH_L ( EBX )
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PUSH_L ( ESI )
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GLOBL GLNAME(_mesa_x86_has_cpuid)
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GLNAME(_mesa_x86_has_cpuid):
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/* Test for the CPUID command. If the ID Flag bit in EFLAGS
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* (bit 21) is writable, the CPUID command is present.
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*/
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* (bit 21) is writable, the CPUID command is present */
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PUSHF_L
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POP_L ( EAX )
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MOV_L ( EAX, ECX )
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XOR_L ( CONST(0x00200000), EAX )
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PUSH_L ( EAX )
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POP_L (EAX)
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MOV_L (EAX, ECX)
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XOR_L (CONST(0x00200000), EAX)
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PUSH_L (EAX)
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POPF_L
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PUSHF_L
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POP_L ( EAX )
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POP_L (EAX)
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/* Verify the ID Flag bit has been written.
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*/
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CMP_L ( ECX, EAX )
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JZ ( LLBL (cpuid_done) )
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/* Verify the ID Flag bit has been written. */
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CMP_L (ECX, EAX)
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SETNE (AL)
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XOR_L (CONST(0xff), EAX)
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/* Get the CPU vendor info.
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*/
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XOR_L ( EAX, EAX )
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CPUID
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/* Test for Intel processors. We must look for the
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* "GenuineIntel" string in EBX, ECX and EDX.
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*/
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CMP_L ( CONST(GENU), EBX )
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JNE ( LLBL(cpuid_amd) )
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CMP_L ( CONST(INEI), EDX )
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JNE ( LLBL(cpuid_amd) )
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CMP_L ( CONST(NTEL), ECX )
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JNE ( LLBL(cpuid_amd) )
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/* We have an Intel processor, so we can get the feature
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* information with an CPUID input value of 1.
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*/
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MOV_L ( CONST(0x1), EAX )
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CPUID
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MOV_L ( EDX, EAX )
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/* Mask out highest bit, which is used by AMD for 3dnow
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* Newer Intel have this bit set, but do not support 3dnow
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*/
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AND_L ( CONST(0X7FFFFFFF), EAX)
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JMP ( LLBL(cpuid_done) )
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LLBL(cpuid_amd):
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/* Test for AMD processors. We must look for the
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* "AuthenticAMD" string in EBX, ECX and EDX.
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*/
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CMP_L ( CONST(AUTH), EBX )
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JNE ( LLBL(cpuid_other) )
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CMP_L ( CONST(ENTI), EDX )
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JNE ( LLBL(cpuid_other) )
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CMP_L ( CONST(CAMD), ECX )
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JNE ( LLBL(cpuid_other) )
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/* We have an AMD processor, so we can get the feature
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* information after we verify that the extended functions are
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* supported.
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*/
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/* The features we need are almost all in the extended set. The
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* exception is SSE enable, which is in the standard set (0x1).
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*/
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MOV_L ( CONST(0x1), EAX )
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CPUID
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TEST_L ( EAX, EAX )
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JZ ( LLBL (cpuid_failed) )
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MOV_L ( EDX, ESI )
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MOV_L ( CONST(0x80000000), EAX )
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CPUID
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TEST_L ( EAX, EAX )
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JZ ( LLBL (cpuid_failed) )
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MOV_L ( CONST(0x80000001), EAX )
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CPUID
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MOV_L ( EDX, EAX )
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AND_L ( CONST(0x02000000), ESI ) /* OR in the SSE bit */
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OR_L ( ESI, EAX )
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JMP ( LLBL (cpuid_done) )
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LLBL(cpuid_other):
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/* Test for other processors here when required.
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*/
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LLBL(cpuid_failed):
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/* If we can't determine the feature information, we must
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* return zero to indicate that no platform-specific
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* optimizations can be used.
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*/
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MOV_L ( CONST(0), EAX )
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LLBL (cpuid_done):
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POP_L ( ESI )
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POP_L ( EBX )
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RET
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ALIGNTEXT4
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GLOBL GLNAME(_mesa_x86_cpuid)
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GLNAME(_mesa_x86_cpuid):
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MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
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PUSH_L (EDI)
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PUSH_L (EBX)
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CPUID
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MOV_L (REGOFF(16, ESP), EDI) /* *eax */
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MOV_L (EAX, REGIND(EDI))
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MOV_L (REGOFF(20, ESP), EDI) /* *ebx */
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MOV_L (EBX, REGIND(EDI))
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MOV_L (REGOFF(24, ESP), EDI) /* *ecx */
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MOV_L (ECX, REGIND(EDI))
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MOV_L (REGOFF(28, ESP), EDI) /* *edx */
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MOV_L (EDX, REGIND(EDI))
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POP_L (EBX)
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POP_L (EDI)
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RET
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ALIGNTEXT4
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GLOBL GLNAME(_mesa_x86_cpuid_eax)
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GLNAME(_mesa_x86_cpuid_eax):
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MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
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PUSH_L (EBX)
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CPUID
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POP_L (EBX)
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RET
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ALIGNTEXT4
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GLOBL GLNAME(_mesa_x86_cpuid_ebx)
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GLNAME(_mesa_x86_cpuid_ebx):
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MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
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PUSH_L (EBX)
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CPUID
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MOV_L (EBX, EAX) /* return EBX */
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POP_L (EBX)
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RET
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ALIGNTEXT4
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GLOBL GLNAME(_mesa_x86_cpuid_ecx)
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GLNAME(_mesa_x86_cpuid_ecx):
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MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
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PUSH_L (EBX)
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CPUID
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MOV_L (ECX, EAX) /* return ECX */
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POP_L (EBX)
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RET
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ALIGNTEXT4
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GLOBL GLNAME(_mesa_x86_cpuid_edx)
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GLNAME(_mesa_x86_cpuid_edx):
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MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
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PUSH_L (EBX)
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CPUID
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MOV_L (EDX, EAX) /* return EDX */
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POP_L (EBX)
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RET
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#ifdef USE_SSE_ASM
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/* Execute an SSE instruction to see if the operating system correctly
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* supports SSE. A signal handler for SIGILL should have been set
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@@ -235,3 +200,4 @@ GLNAME( _mesa_test_os_sse_exception_support ):
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RET
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#endif
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@@ -1,8 +1,8 @@
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/* $Id: common_x86_features.h,v 1.5 2002/10/29 20:28:57 brianp Exp $ */
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/* $Id: common_x86_features.h,v 1.6 2003/01/21 16:14:00 brianp Exp $ */
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/*
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* Mesa 3-D graphics library
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* Version: 3.5
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* Version: 5.1
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*
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* Copyright (C) 1999-2001 Brian Paul All Rights Reserved.
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*
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@@ -35,40 +35,27 @@
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#ifndef __COMMON_X86_FEATURES_H__
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#define __COMMON_X86_FEATURES_H__
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/* Capabilities of CPUs
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*/
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#define X86_FEATURE_FPU 0x00000001
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#define X86_FEATURE_VME 0x00000002
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#define X86_FEATURE_DE 0x00000004
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#define X86_FEATURE_PSE 0x00000008
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#define X86_FEATURE_TSC 0x00000010
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#define X86_FEATURE_MSR 0x00000020
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#define X86_FEATURE_PAE 0x00000040
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#define X86_FEATURE_MCE 0x00000080
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#define X86_FEATURE_CX8 0x00000100
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#define X86_FEATURE_APIC 0x00000200
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#define X86_FEATURE_10 0x00000400
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#define X86_FEATURE_SEP 0x00000800
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#define X86_FEATURE_MTRR 0x00001000
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#define X86_FEATURE_PGE 0x00002000
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#define X86_FEATURE_MCA 0x00004000
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#define X86_FEATURE_CMOV 0x00008000
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#define X86_FEATURE_PAT 0x00010000
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#define X86_FEATURE_PSE36 0x00020000
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#define X86_FEATURE_18 0x00040000
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#define X86_FEATURE_19 0x00080000
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#define X86_FEATURE_20 0x00100000
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#define X86_FEATURE_21 0x00200000
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#define X86_FEATURE_MMXEXT 0x00400000
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#define X86_FEATURE_MMX 0x00800000
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#define X86_FEATURE_FXSR 0x01000000
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#define X86_FEATURE_XMM 0x02000000
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#define X86_FEATURE_XMM2 0x04000000
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#define X86_FEATURE_27 0x08000000
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#define X86_FEATURE_28 0x10000000
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#define X86_FEATURE_29 0x20000000
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#define X86_FEATURE_3DNOWEXT 0x40000000
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#define X86_FEATURE_3DNOW 0x80000000
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#define X86_FEATURE_FPU (1<<0)
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#define X86_FEATURE_CMOV (1<<1)
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#define X86_FEATURE_MMXEXT (1<<2)
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#define X86_FEATURE_MMX (1<<3)
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#define X86_FEATURE_FXSR (1<<4)
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#define X86_FEATURE_XMM (1<<5)
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#define X86_FEATURE_XMM2 (1<<6)
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#define X86_FEATURE_3DNOWEXT (1<<7)
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#define X86_FEATURE_3DNOW (1<<8)
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/* standard X86 CPU features */
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#define X86_CPU_FPU (1<<0)
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#define X86_CPU_CMOV (1<<15)
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#define X86_CPU_MMX (1<<23)
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#define X86_CPU_XMM (1<<25)
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#define X86_CPU_XMM2 (1<<26)
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/* extended X86 CPU features */
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#define X86_CPUEXT_MMX_EXT (1<<22)
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#define X86_CPUEXT_3DNOW_EXT (1<<30)
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#define X86_CPUEXT_3DNOW (1<<31)
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#define cpu_has_mmx (_mesa_x86_cpu_features & X86_FEATURE_MMX)
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#define cpu_has_mmxext (_mesa_x86_cpu_features & X86_FEATURE_MMXEXT)
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@@ -78,3 +65,4 @@
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#define cpu_has_3dnowext (_mesa_x86_cpu_features & X86_FEATURE_3DNOWEXT)
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#endif
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