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i915tex: Sync pages differently when crossing pipe borders.

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Don't flip (up to twice) immediately but just arrange things such that the
pages will be in sync on both pipes on the next flip.
This commit is contained in:
Michel Dänzer
2007-02-28 17:46:07 +01:00
parent 3c578455e1
commit 0609b6afa8
1 changed files with 18 additions and 12 deletions
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src/mesa/drivers/dri/i915tex/intel_buffers.c
+18 -12
View File
@@ -253,19 +253,25 @@ intelWindowMoved(struct intel_context *intel)
pf_active ? "" : "in");
if (pf_active) {
int i;
/* Sync pages between pipes if we're flipping on both at the same time */
for (i = 0; i < 2 && pf_pipes != intel_fb->pf_pipes &&
intel_fb->pf_pipes == 0x3 &&
(intel->sarea->pf_current_page & 0x3) !=
((intel->sarea->pf_current_page) >> 2 & 0x3); i++) {
drm_i915_flip_t flip;
flip.pipes = (intel_fb->pf_current_page ==
(intel->sarea->pf_current_page & 0x3)) ? 0x2 : 0x1;
drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
if (pf_pipes == 0x3 && pf_pipes != intel_fb->pf_pipes &&
(intel->sarea->pf_current_page & 0x3) !=
(((intel->sarea->pf_current_page) >> 2) & 0x3)) {
if (intel_fb->pf_current_page ==
(intel->sarea->pf_current_page & 0x3)) {
/* XXX: This is ugly, but emitting two flips 'in a row' can cause
* lockups for unknown reasons.
*/
intel->sarea->pf_current_page =
intel->sarea->pf_current_page & 0x3;
intel->sarea->pf_current_page |=
intel->sarea->pf_current_page << 2;
} else {
intel->sarea->pf_current_page =
intel->sarea->pf_current_page & (0x3 << 2);
intel->sarea->pf_current_page |=
intel->sarea->pf_current_page >> 2;
}
}
intel_fb->pf_pipes = pf_pipes;