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intel/genxml: Add GT_MODE hashing defs for Gen9.

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Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Francisco Jerez
2019-07-17 18:30:45 -07:00
parent 9406b3a5c1
commit 03cba9f5d9
1 changed files with 17 additions and 0 deletions
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src/intel/genxml/gen9.xml
+17
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@@ -6477,6 +6477,23 @@
<field name="Color Compression Disable Mask" start="31" end="31" type="bool"/>
</register>
<register name="GT_MODE" length="1" num="0x7008">
<field name="Subslice Hashing" start="8" end="9" type="uint">
<value name="8x8" value="0"/>
<value name="16x4" value="1"/>
<value name="8x4" value="2"/>
<value name="16x16" value="3"/>
</field>
<field name="Subslice Hashing Mask" start="24" end="25" type="int"/>
<field name="Slice Hashing" start="11" end="12" type="uint">
<value name="NORMAL" value="0"/>
<value name="DISABLED" value="1"/>
<value name="32x16" value="2"/>
<value name="32x32" value="3"/>
</field>
<field name="Slice Hashing Mask" start="27" end="28" type="int"/>
</register>
<register name="CL_INVOCATION_COUNT" length="2" num="0x2338">
<field name="CL Invocation Count Report" start="0" end="63" type="uint"/>
</register>