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nir/opt_algebraic: create non 32bit bitfield_select

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Foz-DB Navi21:
Totals from 68 (0.08% of 80255) affected shaders:
Instrs: 197878 -> 197709 (-0.09%); split: -0.09%, +0.00%
CodeSize: 1060700 -> 1060472 (-0.02%); split: -0.02%, +0.00%
Latency: 659865 -> 659673 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 117010 -> 116985 (-0.02%); split: -0.03%, +0.00%
VClause: 3781 -> 3779 (-0.05%)
Copies: 15317 -> 15265 (-0.34%); split: -0.35%, +0.01%
PreVGPRs: 3251 -> 3250 (-0.03%)
VALU: 96800 -> 96799 (-0.00%); split: -0.00%, +0.00%
SALU: 57006 -> 56836 (-0.30%); split: -0.30%, +0.00%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36141>
This commit is contained in:
Georg Lehmann
2025-07-15 20:35:49 +02:00
committed by Marge Bot
parent 6a16c504b8
commit 037c2532ab
1 changed files with 7 additions and 4 deletions
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src/compiler/nir/nir_opt_algebraic.py
+7 -4
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@@ -2473,10 +2473,13 @@ optimizations.extend([
(('bitfield_select', ('inot', a), b, c), ('bitfield_select', a, c, b)),
(('bitfield_select', ('ineg', ('b2i', 'a@1')), b, c), ('bcsel', a, b, c)),
(('ior@32', ('iand', a, b), ('iand', ('inot', a), c)), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('iadd@32', ('iand', a, b), ('iand', ('inot', a), c)), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('ixor@32', ('iand', a, b), ('iand', ('inot', a), c)), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('ixor@32', ('iand', a, ('ixor', b, c)), c), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('ior', ('iand', a, b), ('iand', ('inot', a), c)), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('iadd', ('iand', a, b), ('iand', ('inot', a), c)), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('ixor', ('iand', a, b), ('iand', ('inot', a), c)), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
(('ixor', ('iand', a, ('ixor', b, c)), c), ('bitfield_select', a, b, c), 'options->has_bitfield_select'),
# The patterns above could create 1bit bitfield_select, but that's really just bcsel.
(('bitfield_select@1', a, b, c), ('bcsel', a, b, c)),
# Note that these opcodes are defined to only use the five least significant bits of 'offset' and 'bits'
(('ubfe', 'value', 'offset', ('iand', 31, 'bits')), ('ubfe', 'value', 'offset', 'bits')),