AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

radv: set the DCC/FCE predicates from the base level

Browse Source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2019-06-14 15:17:06 +02:00
parent 7832e75ea8
commit 00f0e5c6fd
1 changed files with 2 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/radv_meta_fast_clear.c
+2
View File
@@ -604,6 +604,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
if (radv_image_has_dcc(image)) {
uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
image->fce_pred_offset;
pred_offset += 8 * subresourceRange->baseMipLevel;
old_predicating = cmd_buffer->state.predicating;
@@ -695,6 +696,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
if (radv_image_has_dcc(image)) {
uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
image->fce_pred_offset;
pred_offset += 8 * subresourceRange->baseMipLevel;
cmd_buffer->state.predicating = old_predicating;