José Roberto de Souza fc0acf6d90 anv: Move i915 specific gem_set_caching to backend ...

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25212>

2023-09-13 19:31:45 +00:00

..

blorp

blorp: fix hangs with mesh enabled

2023-09-12 02:51:31 +00:00

ci

ci/anv: Add testing on JSL.

2023-09-13 04:49:02 +00:00

common

intel: Pass virtual memory address space ID while creating context

2023-09-07 06:39:06 +00:00

compiler

compiler/types: Remove unused GLSL_TYPE_FUNCTION and related functions

2023-09-12 23:18:12 +00:00

dev

intel: Sync xe_drm.h

2023-09-13 16:38:15 +00:00

ds

intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium

2023-08-03 22:00:15 +00:00

genxml

intel/genxml: update PIPE_CONTROL instruction for dg2

2023-09-12 19:04:24 +00:00

isl

isl/tilememcpy_test: add multiple tile testing

2023-09-02 21:49:05 -07:00

nullhw-layer

meson: support installation tags

2023-09-11 13:00:45 +00:00

perf

intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h

2023-07-28 15:36:52 +00:00

tools

intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c

2023-09-06 01:39:53 +00:00

vulkan

anv: Move i915 specific gem_set_caching to backend

2023-09-13 19:31:45 +00:00

vulkan_hasvk

meson: support installation tags

2023-09-11 13:00:45 +00:00

meson.build

intel: Only build perf if drivers or tools are enabled

2023-08-31 21:53:19 +00:00