Eric Anholt f71364f297 broadcom: Add vc5 CLIF dumping ...

This will be usable with "VC5_DEBUG=cl" on the vc5 driver to stream a CLIF
file (the Broadcom equivalent of i965's AUB) to stderr.  I haven't tested
that this is actually usable with the internal CLIF-consuming tools, but
is close enough as a baseline and is useful for visually inspecting the
command stream.

2017-10-10 11:42:04 -07:00

..

amd

radv: export KHR_relaxed_block_layout

2017-10-10 13:22:44 +10:00

broadcom

broadcom: Add vc5 CLIF dumping

2017-10-10 11:42:04 -07:00

compiler

nir: Move vc4's alpha test lowering to core NIR.

2017-10-10 11:42:04 -07:00

egl

egl/dri: remove old left-overs

2017-10-10 13:58:47 +02:00

gallium

nir: Move vc4's alpha test lowering to core NIR.

2017-10-10 11:42:04 -07:00

gbm

meson: build gbm

2017-10-09 13:42:44 -07:00

getopt

…

glx

meson: Add support for configuring dri drivers directory.

2017-10-09 13:42:44 -07:00

gtest

meson: convert gtest to an internal dependency

2017-10-03 10:02:08 -07:00

hgl

…

intel

i965/tes: account for the fact that dvec3/4 inputs take two slots

2017-10-10 08:59:54 +02:00

loader

meson: build glx

2017-10-09 13:42:44 -07:00

mapi

mesa: Implement a new GL_MESA_tile_raster_order extension.

2017-10-10 10:45:22 -07:00

mesa

mesa: Alphabetize GL_MESA_tile_raster_order in the extensions list.

2017-10-10 11:42:04 -07:00

util

mesa: move _mesa_half_is_negative() to half_float.h

2017-10-10 11:28:31 -06:00

vulkan

vulkan: util: add macros to extract extension/offset number from enums

2017-10-06 11:45:41 +01:00

git_sha1.h.in

meson: Build i965 and dri stack

2017-10-09 13:42:44 -07:00

Makefile.am

configure: Add the new "vc5" driver to the list, requiring a simulator.

2017-10-10 11:42:04 -07:00

meson.build

meson: build gbm

2017-10-09 13:42:44 -07:00

SConscript

scons: use python3-compatible print()

2017-09-25 11:57:12 +01:00