Files
mesa/src
Francisco Jerez ef6ef7aa8e intel/fs/xe2+: Implement PS thread payload register offset setup.
The PS thread payload format has changed enough in Xe2 that it
probably doesn't make sense to share code with gfx6.  See BSpec page
"PS Thread Payload for Normal Dispatch - 512 bit GRF" for the new
format.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26606>
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