Tim Rowley ead0dfe31e swr/rast: adjust linux cpu topology identification code ...

Make more robust to handle strange strange configurations like a vmware
exported 4-way numa X 1-core configuration.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

2017-09-13 10:09:47 -05:00

..

amd

radv: compile out unused code

2017-09-13 11:19:30 +01:00

broadcom

broadcom/genxml: Add V3D 3.3 packet definitions.

2017-08-18 12:54:13 -07:00

compiler

glsl: compile unused function out

2017-09-13 11:22:27 +01:00

egl

egl+glx: turn LIBGL_DRI3_DISABLE into a boolean

2017-09-12 13:53:12 +01:00

gallium

swr/rast: adjust linux cpu topology identification code

2017-09-13 10:09:47 -05:00

gbm

gbm: turn GBM_ALWAYS_SOFTWARE into a boolean

2017-09-12 13:53:11 +01:00

getopt

…

glx

glx: turn LIBGL_NO_DRAWARRAYS into a boolean

2017-09-12 13:53:12 +01:00

gtest

gtest: Update to 1.8.0.

2017-01-20 11:40:52 -08:00

hgl

…

intel

intel/eu/validate: Look up types on demand in execution_type()

2017-09-12 15:01:00 -07:00

loader

loader/dri3: Make sure we invalidate a drawable on size change

2017-09-07 12:43:29 +02:00

mapi

mapi/gen: remove shebang from the marshal generator scripts

2017-08-26 11:20:08 +01:00

mesa

i965: do not fallback to linear tiling for stencil surfaces

2017-09-12 08:09:45 +02:00

util

util/disk_cache: turn MESA_GLSL_CACHE_DISABLE into a boolean

2017-09-12 13:53:12 +01:00

vulkan

vulkan/util: Add a vk_zalloc helper

2017-08-28 18:35:33 -07:00

Makefile.am

build: Convert git_sha1_gen script to Python (part2).

2017-08-01 16:33:55 +01:00

SConscript

build: Convert git_sha1_gen script to Python.

2017-08-01 15:24:39 +01:00