For a dGPU, we should have:
1. RAM
2. RAM + write-combined CPU access
3. RAM + cached CPU access
4. VRAM
Eventually there'll be VRAM + write-combined CPU access after 4, using "GPU upload heaps"
For an iGPU, we should have:
1. RAM (declared as device-local)
2. RAM + write-combined CPU access (declared as device-local)
3. RAM + cached CPU access (declared as device-local)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26037>