Files
mesa/src/intel
Marcin Ślusarz 97c3ec6116 intel/compiler: cache computed register pressure benefit
This halves the number of calls to get_register_pressure_benefit
and decreases shader-db CPU time by ~1.5%.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8741>
2021-01-29 11:31:39 +00:00
..
2020-12-01 19:06:22 +00:00
2020-12-01 19:06:22 +00:00
2020-12-01 19:06:22 +00:00
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