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Marcin Ślusarz dd9bf86725 intel/compiler/mesh: use slice id of task urb handles in mesh shaders 
When mesh shader is spawned on a different slice than the originating
task shader, then input task urb handle can come from a different
slice, so masking this information off will load data from the current
slice, instead of the one where real data are.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21007>
2023-02-14 09:36:53 +00:00
..
blorp
intel/blorp: disable REP16 for gfx12+ with R10G10B10_FLOAT_A2
2023-02-09 06:34:43 +00:00
ci
anv: expose EXT_load_store_op_none
2023-02-01 12:53:29 +00:00
common
anv: add video engine support in various places
2023-02-08 02:56:28 +00:00
compiler
intel/compiler/mesh: use slice id of task urb handles in mesh shaders
2023-02-14 09:36:53 +00:00
dev
intel/dev: add a default urb value for intel_stub_gpu on dg2
2023-02-13 09:38:06 +00:00
ds
intel/ds: track end of pipe bits
2023-02-06 09:12:18 +00:00
genxml
intel/genxml: add missing power well control bits
2023-02-08 02:56:28 +00:00
isl
intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)
2022-12-15 11:43:00 -08:00
nullhw-layer
utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*
2022-11-02 07:25:39 +00:00
perf
intel: add MTL performance metrics
2022-12-09 09:13:02 +00:00
tools
anv,hasvk: migrate align32 to the right functions from util
2023-01-06 17:22:16 +00:00
vulkan
anv: implement VK_EXT_vertex_input_dynamic_state
2023-02-14 09:05:35 +00:00
vulkan_hasvk
anv/hasvk: handle a SAMPLED_READ/STORAGE_READ access flags
2023-02-13 20:11:40 +00:00
meson.build
intel: Disable SSE2 instruction set if building for non x86 architectures
2022-11-23 16:57:23 +00:00