Guido Günther d817f2c696 etnaviv: drm: Don't miscalculate timeout ...

The current code overflows (s * 1000000000) for s >= 5 but that is
e.g. used in etna_bo_cpu_prep.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3509>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3509>

2020-01-22 13:22:47 +00:00

..

drm

etnaviv: drm: Don't miscalculate timeout

2020-01-22 13:22:47 +00:00

drm-shim

etnaviv: add drm-shim

2019-11-21 22:56:04 +00:00

meson.build

etnaviv: add drm-shim

2019-11-21 22:56:04 +00:00