Anuj Phogat ceed55e7bb intel/genxml: Add Gen10 CACHE_MODE_1 definitions ...

Few of the fields in this register are changed as compared
to gen9.xml.

V2: Remove some fields which are not valid anymore.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

2017-06-22 14:17:45 -07:00

..

amd

radeonsi/gfx9: fix TC-compatible stencil compression

2017-06-19 20:15:36 +02:00

compiler

glsl: tidy up int declaration

2017-06-22 20:06:38 +10:00

egl

egl: Rename 'count' in ${platform}_add_configs_for_visuals (v2)

2017-06-22 12:35:49 -07:00

gallium

svga: minor whitespace fixes in svga_pipe_vertex.c

2017-06-22 13:33:48 -06:00

gbm

gbm: implement FD import with modifier

2017-06-15 10:43:36 +01:00

getopt

Introduce .editorconfig

2016-08-31 17:06:54 -07:00

glx

egl: turn one more boolean int into a bool

2017-06-21 21:42:14 +01:00

gtest

gtest: Update to 1.8.0.

2017-01-20 11:40:52 -08:00

hgl

glapi/hgl: remove the final user of _glapi_check_table()

2016-10-06 15:03:46 +01:00

intel

intel/genxml: Add Gen10 CACHE_MODE_1 definitions

2017-06-22 14:17:45 -07:00

loader

egl: turn one more boolean int into a bool

2017-06-21 21:42:14 +01:00

mapi

mesa: add KHR_no_error support for glStencilOp()

2017-06-21 08:47:26 +02:00

mesa

i965/dri: Add intel_screen param to intel_create_winsys_renderbuffer

2017-06-22 12:44:28 -07:00

util

mesa/util: add util_dynarray_clear() helper

2017-06-18 14:10:32 +02:00

vulkan

Android: vulkan: fix build error due to extra )

2017-06-08 07:26:04 -05:00

Makefile.am

automake: increase the MESA_GIT_SHA1 hash id length from 7 to 10 digits

2017-06-15 13:53:00 -06:00

SConscript

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