Timur Kristóf ccb4b78840 radv/amdgpu: Add a few assertions during submit. ...

These are useful when debugging the submission code.

- Ensure correct IB alignment
- Ensure we don't submit empty IBs

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>

2023-04-11 17:05:02 +00:00

..

addrlib

amd: update addrlib

2023-03-29 20:36:09 +00:00

ci

ci/amd: add draw.dynamic_rendering flake

2023-04-11 15:10:37 +00:00

common

ac: Add maximum number of submitted IBs.

2023-04-11 17:05:02 +00:00

compiler

aco: Remove is_gs_copy_shader

2023-04-11 06:24:17 +00:00

drm-shim

r300: use drm_shim_override

2022-11-16 14:37:47 +00:00

llvm

ac/llvm: Cover runtime 0 in GFX10 gs_alloc_req workaround.

2023-04-08 13:54:06 +00:00

registers

amd/registers: use gfx9 packet definitions for gfx940

2023-04-06 15:00:54 +00:00

vulkan

radv/amdgpu: Add a few assertions during submit.

2023-04-11 17:05:02 +00:00

.clang-format

amd: Add radv_foreach_stage to ForEachMacros.

2023-03-27 08:29:35 +00:00

meson.build

meson: build radeon drm-shim also for r300 and r600

2022-11-16 14:37:47 +00:00