Files
mesa/src
Kenneth Graunke c747c1e1f4 intel/brw: Fix spill/fill count for load/store_scratch in SIMD32
Honestly, I don't know what I was thinking - we are emitting a single
spill/fill message here, but were counting it as 2 spill/fills in SIMD32
shaders.  So our eventual shader stat reporting would subtract the
number of spills and fills from send_count, and get a negative number,
wrapping around to just shy of UINT32_MAX.  That's way too many sends.

This is especially noticable on Xe2 which often uses SIMD32 shaders.

Backport-to: 24.2
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31499>
2024-10-15 18:14:37 +00:00
..
2024-10-10 20:52:02 +00:00
2024-09-19 05:06:50 +00:00
2024-10-10 11:05:57 +00:00
2024-09-06 17:34:17 +00:00