Marek Olšák
18e760346a
Highlights: - Display needs tiled pitch alignment to be at least 32 pixels - Implement Addr2ComputeDccAddrFromCoord(). - Macro-pixel packed formats don't support Z swizzle modes - Pad pitch and base alignment of PRT + TEX1D to 64KB. - Fix support for multimedia formats - Fix a case "PRT" entries are not selected on SI. - Fix wrong upper bits in equations for 3D resource. - We can't support 2d array slice rotation in gfx8 swizzle pattern - Set base alignment for PRT + non-xor swizzle mode resource to 64KB. - Bug workaround for Z16 4x/8x and Z32 2x/4x/8x MSAA depth texture - Add stereo support - Optimize swizzle mode selection - Report pitch and height in pixels for each mip - Adjust bpp/expandX for format ADDR_FMT_GB_GR/ADDR_FMT_BG_RG - Correct tcCompatible flag output for mipmap surface - Other fixes and cleanups Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
546 lines
20 KiB
C++
546 lines
20 KiB
C++
/*
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* Copyright © 2016 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/**
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****************************************************************************************************
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* @file addrlib1.h
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* @brief Contains the Addr::V1::Lib class definition.
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****************************************************************************************************
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*/
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#ifndef __ADDR_LIB1_H__
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#define __ADDR_LIB1_H__
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#include "addrlib.h"
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namespace Addr
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{
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namespace V1
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{
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/**
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****************************************************************************************************
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* @brief Neutral enums that define bank swap size
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****************************************************************************************************
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*/
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enum SampleSplitSize
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{
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ADDR_SAMPLESPLIT_1KB = 1024,
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ADDR_SAMPLESPLIT_2KB = 2048,
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ADDR_SAMPLESPLIT_4KB = 4096,
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ADDR_SAMPLESPLIT_8KB = 8192,
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};
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/**
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****************************************************************************************************
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* @brief Flags for AddrTileMode
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****************************************************************************************************
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*/
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struct TileModeFlags
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{
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UINT_32 thickness : 4;
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UINT_32 isLinear : 1;
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UINT_32 isMicro : 1;
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UINT_32 isMacro : 1;
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UINT_32 isMacro3d : 1;
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UINT_32 isPrt : 1;
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UINT_32 isPrtNoRotation : 1;
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UINT_32 isBankSwapped : 1;
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};
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static const UINT_32 Block64K = 0x10000;
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static const UINT_32 PrtTileSize = Block64K;
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/**
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****************************************************************************************************
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* @brief This class contains asic independent address lib functionalities
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****************************************************************************************************
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*/
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class Lib : public Addr::Lib
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{
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public:
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virtual ~Lib();
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static Lib* GetLib(
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ADDR_HANDLE hLib);
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/// Returns tileIndex support
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BOOL_32 UseTileIndex(INT_32 index) const
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{
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return m_configFlags.useTileIndex && (index != TileIndexInvalid);
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}
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/// Returns combined swizzle support
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BOOL_32 UseCombinedSwizzle() const
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{
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return m_configFlags.useCombinedSwizzle;
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}
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//
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// Interface stubs
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//
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ADDR_E_RETURNCODE ComputeSurfaceInfo(
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const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
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ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
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const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
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const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
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ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeSliceTileSwizzle(
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const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
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ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ExtractBankPipeSwizzle(
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const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
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ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE CombineBankPipeSwizzle(
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const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
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ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeBaseSwizzle(
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const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
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ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeFmaskInfo(
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const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
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ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
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ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
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const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
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const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
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ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ConvertTileInfoToHW(
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const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
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ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ConvertTileIndex(
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const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
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ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE GetMacroModeIndex(
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const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
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ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ConvertTileIndex1(
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const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
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ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE GetTileIndex(
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const ADDR_GET_TILEINDEX_INPUT* pIn,
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ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeHtileInfo(
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const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
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ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeCmaskInfo(
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const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
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ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeDccInfo(
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const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
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ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
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const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
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const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
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const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
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ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
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const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
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ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const;
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ADDR_E_RETURNCODE ComputePrtInfo(
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const ADDR_PRT_INFO_INPUT* pIn,
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ADDR_PRT_INFO_OUTPUT* pOut) const;
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protected:
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Lib(); // Constructor is protected
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Lib(const Client* pClient);
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/// Pure Virtual function for Hwl computing surface info
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virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
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const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
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ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl computing surface address from coord
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virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord(
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const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl computing surface coord from address
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virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr(
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const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
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ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl computing surface tile swizzle
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virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle(
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const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
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ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b
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virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle(
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const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
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ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl combining bank/pipe swizzle
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virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle(
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UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
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UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0;
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/// Pure Virtual function for Hwl computing base swizzle
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virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle(
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const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
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ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl computing HTILE base align
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virtual UINT_32 HwlComputeHtileBaseAlign(
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BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
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/// Pure Virtual function for Hwl computing HTILE bpp
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virtual UINT_32 HwlComputeHtileBpp(
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BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0;
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/// Pure Virtual function for Hwl computing HTILE bytes
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virtual UINT_64 HwlComputeHtileBytes(
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UINT_32 pitch, UINT_32 height, UINT_32 bpp,
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BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0;
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/// Pure Virtual function for Hwl computing FMASK info
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virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
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const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
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ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0;
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/// Pure Virtual function for Hwl FMASK address from coord
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virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord(
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const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl FMASK coord from address
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virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr(
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const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
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ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl convert tile info from real value to HW value
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virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
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const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
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ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0;
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/// Pure Virtual function for Hwl compute mipmap info
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virtual BOOL_32 HwlComputeMipLevel(
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ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
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/// Pure Virtual function for Hwl compute max cmask blockMax value
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virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0;
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/// Pure Virtual function for Hwl compute fmask bits
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virtual UINT_32 HwlComputeFmaskBits(
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const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
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UINT_32* pNumSamples) const = 0;
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/// Virtual function to get index (not pure then no need to implement this in all hwls
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virtual ADDR_E_RETURNCODE HwlGetTileIndex(
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const ADDR_GET_TILEINDEX_INPUT* pIn,
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ADDR_GET_TILEINDEX_OUTPUT* pOut) const
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{
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return ADDR_NOTSUPPORTED;
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}
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/// Virtual function for Hwl to compute Dcc info
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virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
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const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
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ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const
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{
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return ADDR_NOTSUPPORTED;
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}
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/// Virtual function to get cmask address for tc compatible cmask
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virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
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const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
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{
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return ADDR_NOTSUPPORTED;
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}
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/// Virtual function to get htile address for tc compatible htile
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virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
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const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
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ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const
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{
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return ADDR_NOTSUPPORTED;
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}
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// Compute attributes
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// HTILE
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UINT_32 ComputeHtileInfo(
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ADDR_HTILE_FLAGS flags,
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UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices,
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BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
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ADDR_TILEINFO* pTileInfo,
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UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes,
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UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL,
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UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const;
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// CMASK
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ADDR_E_RETURNCODE ComputeCmaskInfo(
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ADDR_CMASK_FLAGS flags,
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UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear,
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ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
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UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL,
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UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const;
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virtual VOID HwlComputeTileDataWidthAndHeightLinear(
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UINT_32* pMacroWidth, UINT_32* pMacroHeight,
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UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
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// CMASK & HTILE addressing
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virtual UINT_64 HwlComputeXmaskAddrFromCoord(
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UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice,
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UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8,
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BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
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UINT_32* bitPosition) const;
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virtual VOID HwlComputeXmaskCoordFromAddr(
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UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
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UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
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ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
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// Surface mipmap
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VOID ComputeMipLevel(
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ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
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/// Pure Virtual function for Hwl to get macro tiled alignment info
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virtual BOOL_32 HwlGetAlignmentInfoMacroTiled(
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const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
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UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0;
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virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
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{
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// not supported in hwl layer
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}
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virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
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{
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// not supported in hwl layer
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}
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virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
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{
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// not supported in hwl layer
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}
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AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const;
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VOID PadDimensions(
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AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
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UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
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UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
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UINT_32* pSlices, UINT_32 sliceAlign) const;
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virtual VOID HwlPadDimensions(
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AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
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UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel,
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UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign) const
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{
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}
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//
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// Addressing shared for linear/1D tiling
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//
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UINT_64 ComputeSurfaceAddrFromCoordLinear(
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UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample,
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UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
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UINT_32* pBitPosition) const;
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VOID ComputeSurfaceCoordFromAddrLinear(
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UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp,
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UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
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UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const;
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VOID ComputeSurfaceCoordFromAddrMicroTiled(
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UINT_64 addr, UINT_32 bitPosition,
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UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
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AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
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UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
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AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const;
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ADDR_E_RETURNCODE ComputeMicroTileEquation(
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UINT_32 bpp, AddrTileMode tileMode,
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AddrTileType microTileType, ADDR_EQUATION* pEquation) const;
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UINT_32 ComputePixelIndexWithinMicroTile(
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UINT_32 x, UINT_32 y, UINT_32 z,
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UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const;
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/// Pure Virtual function for Hwl computing coord from offset inside micro tile
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virtual VOID HwlComputePixelCoordFromOffset(
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UINT_32 offset, UINT_32 bpp, UINT_32 numSamples,
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AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
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UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
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AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0;
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//
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// Addressing shared by all
|
|
//
|
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virtual UINT_32 HwlGetPipes(
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const ADDR_TILEINFO* pTileInfo) const;
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UINT_32 ComputePipeFromAddr(
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|
UINT_64 addr, UINT_32 numPipes) const;
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|
virtual ADDR_E_RETURNCODE ComputePipeEquation(
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UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const
|
|
{
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|
return ADDR_NOTSUPPORTED;
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|
}
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|
/// Pure Virtual function for Hwl computing pipe from coord
|
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virtual UINT_32 ComputePipeFromCoord(
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UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode,
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UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0;
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|
/// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile
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|
virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
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UINT_32 pipe, UINT_32 x) const = 0;
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|
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|
//
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|
// Misc helper
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|
//
|
|
static const TileModeFlags ModeFlags[ADDR_TM_COUNT];
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|
|
|
static UINT_32 Thickness(
|
|
AddrTileMode tileMode);
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|
|
|
// Checking tile mode
|
|
static BOOL_32 IsMacroTiled(AddrTileMode tileMode);
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|
static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode);
|
|
static BOOL_32 IsLinear(AddrTileMode tileMode);
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|
static BOOL_32 IsMicroTiled(AddrTileMode tileMode);
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|
static BOOL_32 IsPrtTileMode(AddrTileMode tileMode);
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|
static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode);
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|
|
|
/// Return TRUE if tile info is needed
|
|
BOOL_32 UseTileInfo() const
|
|
{
|
|
return !m_configFlags.ignoreTileInfo;
|
|
}
|
|
|
|
/// Adjusts pitch alignment for flipping surface
|
|
VOID AdjustPitchAlignment(
|
|
ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const;
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|
|
|
/// Overwrite tile config according to tile index
|
|
virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
|
|
UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
|
|
ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const;
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|
|
|
/// Overwrite macro tile config according to tile index
|
|
virtual INT_32 HwlComputeMacroModeIndex(
|
|
INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
|
|
ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL
|
|
) const
|
|
{
|
|
return TileIndexNoMacroIndex;
|
|
}
|
|
|
|
/// Pre-handler of 3x pitch (96 bit) adjustment
|
|
virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
|
|
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
|
|
/// Post-handler of 3x pitch adjustment
|
|
virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
|
|
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
|
|
/// Check miplevel after surface adjustment
|
|
ADDR_E_RETURNCODE PostComputeMipLevel(
|
|
ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
|
|
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
|
|
|
/// Quad buffer stereo support, has its implementation in ind. layer
|
|
VOID ComputeQbStereoInfo(
|
|
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
|
|
|
|
/// Pure virutual function to compute stereo bank swizzle for right eye
|
|
virtual UINT_32 HwlComputeQbStereoRightSwizzle(
|
|
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
|
|
|
|
VOID OptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
|
|
|
|
/// Overwrite tile setting to PRT
|
|
virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
|
|
{
|
|
}
|
|
|
|
static BOOL_32 DegradeTo1D(
|
|
UINT_32 width, UINT_32 height,
|
|
UINT_32 macroTilePitchAlign, UINT_32 macroTileHeightAlign);
|
|
|
|
private:
|
|
// Disallow the copy constructor
|
|
Lib(const Lib& a);
|
|
|
|
// Disallow the assignment operator
|
|
Lib& operator=(const Lib& a);
|
|
|
|
UINT_32 ComputeCmaskBaseAlign(
|
|
ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const;
|
|
|
|
UINT_64 ComputeCmaskBytes(
|
|
UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const;
|
|
|
|
//
|
|
// CMASK/HTILE shared methods
|
|
//
|
|
VOID ComputeTileDataWidthAndHeight(
|
|
UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo,
|
|
UINT_32* pMacroWidth, UINT_32* pMacroHeight) const;
|
|
|
|
UINT_32 ComputeXmaskCoordYFromPipe(
|
|
UINT_32 pipe, UINT_32 x) const;
|
|
};
|
|
|
|
} // V1
|
|
} // Addr
|
|
|
|
#endif
|
|
|