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mesa/src/amd
Timur Kristóf c183eb5bc8 radv: Flush L2 before CP DMA copy/fill when CP DMA doesn't use L2
In case the source or destination were previously written
through L2, we need to writeback L2 to avoid the CP DMA accessing
stale data.

However, as the CP DMA doesn't write L2 either, an invalidation
is also needed to make sure other clients don't access stale data
when they read it through L2 after the CP DMA is complete.

Doing an invalidation before the CP DMA operation should take
care of both.

Additionally, radv_src_access_flush also invalidates L2 before
the copied data can be read.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36820>
2025-09-13 05:18:28 +00:00
..
2025-09-11 16:02:38 +00:00
2025-08-19 12:15:01 +00:00
2025-08-20 10:42:01 +08:00