Georg Lehmann be93e38152 aco/vn: remove instruction hash templates ...

This reuses the instruction data size helper used for creating instruction.
It also removes the hashing of the aco::spans used for operands and definitions,
which was redundant with hash finalization.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28527>

2024-04-05 10:23:16 +00:00

..

addrlib

amd: fix addrlib regression

2024-03-22 08:25:21 +00:00

ci

ci: Nightly run expectations update

2024-04-02 07:52:42 +00:00

common

ac/nir/tess: Clarify when VS-TCS I/O can use registers.

2024-04-03 17:37:40 +00:00

compiler

aco/vn: remove instruction hash templates

2024-04-05 10:23:16 +00:00

drm-shim

amd: Use align64 instead of ALIGN for 64 bit value parameter

2024-01-03 22:02:17 +00:00

llvm

ac/llvm, radeonsi: Handle tess_rel_patch_id in common code.

2024-03-30 21:56:20 +01:00

registers

amd/registers: add correct gfx11.x enums for BINNING_MODE

2024-03-11 23:36:55 +00:00

vpelib

radeonsi/vpe: support vpe 1.1

2024-03-25 00:59:02 +00:00

vulkan

radv: remove radv_private.h

2024-04-04 21:57:46 +00:00

meson.build

amd,radeonsi: add libvpe

2023-12-01 00:23:38 +00:00