Ruijing Dong 7525d2242b radeonsi/vcn: add enc surface alignment caps ...

set [64x16] as the alignment for hevc
encoding surface.

Cc: mesa-stable
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28280>

2024-03-25 14:38:46 +00:00

..

addrlib

amd: fix addrlib regression

2024-03-22 08:25:21 +00:00

ci

ci/deqp-runner: split gl & gles groups to use the correct binary

2024-03-24 22:14:06 +00:00

common

radeonsi/vcn: add enc surface alignment caps

2024-03-25 14:38:46 +00:00

compiler

aco/spill: keep loop variables spilled during nested loops

2024-03-25 09:21:20 +00:00

drm-shim

amd: Use align64 instead of ALIGN for 64 bit value parameter

2024-01-03 22:02:17 +00:00

llvm

ac/llvm: remove remnants of gfx10 NGG streamout

2024-03-22 21:58:02 +00:00

registers

amd/registers: add correct gfx11.x enums for BINNING_MODE

2024-03-11 23:36:55 +00:00

vpelib

radeonsi/vpe: support vpe 1.1

2024-03-25 00:59:02 +00:00

vulkan

radv: make sure to disable NGG culling with TES when the FS stage is unknown

2024-03-25 11:48:58 +00:00

meson.build

amd,radeonsi: add libvpe

2023-12-01 00:23:38 +00:00