Samuel Pitoiset b6ba4cb407 aco: do not set COMPR for exports but use 0x3 channel mask on GFX11 ...

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>

2022-05-12 15:46:20 +00:00

..

addrlib

amd: add chip identification for gfx1100-1103

2022-05-10 04:29:55 +00:00

ci

ci: Fix tests expectations

2022-05-04 23:39:15 +00:00

common

radv,aco: Use ray_launch_size_addr

2022-05-12 15:04:31 +00:00

compiler

aco: do not set COMPR for exports but use 0x3 channel mask on GFX11

2022-05-12 15:46:20 +00:00

drm-shim

Use proper types for meson objects

2022-04-18 13:03:08 +03:00

llvm

amd: fix ac_build_mbcnt_add in wave32 mode

2022-05-12 07:46:04 +00:00

registers

amd: add gfx11 to packet definitions

2022-05-10 04:29:54 +00:00

vulkan

radv,aco: use the new TCS WaveID SGPR to compute vs_rel_patch_id on GFX11

2022-05-12 15:46:20 +00:00

.clang-format

radv: allow holes in inline push constants

2022-04-12 11:44:30 +00:00

meson.build

r300/r600: Add drm-shim support.

2022-02-02 00:59:08 +00:00