Files
mesa/src
Chia-I Wu af7bcc0cdc freedreno: avoid conditional ib in fd6_emit_tile
CP_REG_TEST (or any command that reads registers) is slow on a618
(gen1).  Since SQE can early return, we don't necessarily need
emit_conditional_ib in fd6_emit_tile.

We still CP_REG_TEST twice for load and store when there is no clear.
Not sure if we can simply drop emit_conditional_ib instead?

glmark2 score goes from 943 to 1067.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21208>
2023-02-10 06:31:47 +00:00
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