Jason Ekstrand
aecde23519
It turns off that emitting push constants is one of the hottest paths in the driver and ANY work we do there costs us. By pre-computing things a bit ahead of time, we shave 5% off the runtime of a CPU-limited example running with the Dawn WebGPU implementation. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
74 lines
2.7 KiB
C
74 lines
2.7 KiB
C
/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef ANV_NIR_H
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#define ANV_NIR_H
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#include "nir/nir.h"
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#include "anv_private.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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void anv_nir_lower_push_constants(nir_shader *shader);
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bool anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask);
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bool anv_nir_lower_ycbcr_textures(nir_shader *shader,
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struct anv_pipeline_layout *layout);
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static inline nir_address_format
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anv_nir_ssbo_addr_format(const struct anv_physical_device *pdevice,
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bool robust_buffer_access)
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{
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if (pdevice->has_a64_buffer_access) {
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if (robust_buffer_access)
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return nir_address_format_64bit_bounded_global;
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else
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return nir_address_format_64bit_global;
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} else {
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return nir_address_format_32bit_index_offset;
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}
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}
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void anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice,
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bool robust_buffer_access,
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struct anv_pipeline_layout *layout,
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nir_shader *shader,
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struct brw_stage_prog_data *prog_data,
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struct anv_pipeline_bind_map *map);
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void anv_compute_push_layout(const struct anv_physical_device *pdevice,
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struct brw_stage_prog_data *prog_data,
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struct anv_pipeline_bind_map *map);
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bool anv_nir_add_base_work_group_id(nir_shader *shader,
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struct brw_cs_prog_data *prog_data);
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#ifdef __cplusplus
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}
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#endif
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#endif /* ANV_NIR_H */
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