Nanley Chery 4003f2d48d anv: Optimize genX(cmd_buffer_emit_gfx12_depth_wa) ...

Only emit the workaround as needed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11454>

2021-08-20 17:50:35 +00:00

..

blorp

intel/isl: Use uint64_t for computed byte offsets

2021-08-17 09:36:13 -05:00

common

meson/intel: Don't build genxml tests on Android

2021-08-11 23:57:52 +00:00

compiler

intel/compiler: Lower 8-bit ops to 16-bit in NIR on all platforms

2021-08-18 22:03:37 +00:00

dev

intel/pci-ids: Re-enable DG1 and add SG1

2021-08-18 17:35:41 +00:00

ds

pps: fix a missing include in Intel pps driver

2021-05-21 22:03:16 +00:00

genxml

genxml: add INSTDONE_GEOM register for Gfx12.5

2021-08-17 08:05:45 +00:00

isl

intel: Move the D16 workarounds out of ISL

2021-08-20 17:50:35 +00:00

nullhw-layer

intel/nullhw: fix build

2021-03-26 20:12:40 +00:00

perf

intel/perf: Use a char array for OA perf query data

2021-08-11 23:57:52 +00:00

tools

intel/error-decode: printout INSTDONE_GEOM register for Gfx12.5

2021-08-17 08:05:45 +00:00

vulkan

anv: Optimize genX(cmd_buffer_emit_gfx12_depth_wa)

2021-08-20 17:50:35 +00:00

Makefile.perf.am

intel: Rename GEN_PERF prefix to INTEL_PERF in build files

2021-04-20 20:06:34 +00:00

meson.build

pps: Intel pps driver

2021-05-18 14:28:48 +00:00